Inventor

Thomas Bert Gorczyca

Inventor

Schenectady, NY, US

Overview

1982–2020

Patent span

Electricity

Primary field (CPC H)

Patents· 60 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1020%

Y10TTechnical subjects covered by former us classification9%

C08GMacromolecular compounds obtained otherwise than by reactions only involving unsaturated carbon-to-carbon bonds7%

Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests6%

B29CShaping or joining of plastics6%

H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h104%

G02BOptical elements, systems or apparatus4%

B29DProducing particular articles from plastics or from substances in a plastic state3%

C08LCompositions of macromolecular compounds3%

C09JAdhesives3%

PatentTitleYear

10,573,722Systems and methods for in-situ doped semiconductor gate electrodes for wide bandgap semiconductor power devices2020 10,276,486Stress resistant micro-via structure for flexible circuits2019 9,929,319'LED package with red-emitting phosphors'2018 8,704,211'High integrity protective coatings'2014 8,691,371'Barrier coating and method'2014 8,629,003'Epoxy encapsulating and lamination adhesive and method of making same'2014 8,604,612'Chip attach adhesive to facilitate embedded chip build up and related systems and methods'2013 8,586,421'Method of forming semiconductor device package having high breakdown voltage and low parasitic inductance'2013 8,431,444'Epoxy encapsulating and lamination adhesive and method of making same'2013 8,427,845'Electrical connectors for optoelectronic device packaging'2013 8,310,040'Semiconductor device package having high breakdown voltage and low parasitic inductance and method of manufacturing thereof'2012 7,956,457'System and apparatus for venting electronic packages and method of making same'2011 7,776,236'Index contrast enhanced optical waveguides and fabrication methods'2010 7,742,672'Composition, optical device article, and associated method'2010 7,541,391'Self-forming polymer waveguide and waveguide material with reduced shrinkage'2009 7,400,809'Optical waveguide devices and method of making the same'2008 7,299,535'Methods for making data storage media and the resultant media'2007 7,018,572'Method for producing data storage media'2006 7,018,580'Method and apparatus for forming tapered waveguide structures'2006 6,977,057'Embossing process'2005 6,935,792'Optoelectronic package and fabrication method'2005 6,800,373'Epoxy resin compositions, solid state devices encapsulated therewith and method'2004 6,787,071'Method and apparatus for producing data storage media'2004 6,715,200'Methods for making data storage media'2004 6,709,608'Semiconductor processing component'2004 6,706,205'Semiconductor processing article'2004 6,706,624'Method for making multichip module substrates by encapsulating electrical conductors'2004 6,602,739'Method for making multichip module substrates by encapsulating electrical conductors and filling gaps'2003 6,548,189'Epoxy adhesive'2003 6,533,968'Structure and method for molding optical disks'2003 6,508,961'Structure and method for molding optical disks'2003 6,504,233'Semiconductor processing component'2003 6,396,153'Circuit chip package and fabrication method'2002 6,368,410'Semiconductor processing article'2002 6,303,193'Process for fabricating a tool used in electrochemical machining'2001 6,302,987'High voltage polymer processing methods and power feed-through bushing applications'2001 6,284,564'HDI chip attachment method for reduced processing'2001 6,255,137'Method for making air pockets in an HDI context'2001 6,242,282'Circuit chip package and fabrication method'2001 6,146,558'Structure and method for molding optical disks'2000 6,067,931'Thermal processor for semiconductor wafers'2000 5,757,072'Structure for protecting air bridges on semiconductor chips from damage'1998 5,703,400'Fabrication and structures of two-sided molded circuit modules with flexible interconnect layers'1997 5,567,657'Fabrication and structures of two-sided molded circuit modules with flexible interconnect layers'1996 5,561,085'Structure for protecting air bridges on semiconductor chips from damage'1996 5,546,654'Vacuum fixture and method for fabricating electronic assemblies'1996 5,492,586'Method for fabricating encased molded multi-chip module substrate'1996 5,472,539'Methods for forming and positioning moldable permanent magnets on electromagnetically actuated microfabricated components'1995 5,302,547'Systems for patterning dielectrics by laser ablation'1994 5,300,812'Plasticized polyetherimide adhesive composition and usage'1994 5,285,571'Method for extending an electrical conductor over an edge of an HDI substrate'1994 5,169,911'Heat curable blends of silicone polymide and epoxy resin'1992 5,161,093'Multiple lamination high density interconnect process and structure employing a variable crosslinking adhesive'1992 5,098,326'Method for applying a protective coating to a high-intensity metal halide discharge lamp'1992 5,057,751'Protective coating for high-intensity metal halide discharge lamps'1991 4,728,697'Novel copolyamideimides, prepolymers therefor and method for their preparation'1988 4,533,504'Process for the preparation of diaryl carbonates'1985 4,433,131'Coating solution of polyetherimide monomers'1984 4,374,972'Coating solution of polyetherimide oligomers'1983 4,360,633'Coating solution of polyetherimide oligomers'1982

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1982–2020Patents assigned to GEN ELECTRIC (53)· patent assignee history

1982–2020Based in Schenectady, NY, US· patent location history

1996–1998Patents assigned to MARTIN MARIETTA CORP (3)· patent assignee history

1996Based in Schnectady, NY, US· patent location history

2001–2004Patents assigned to LOCKHEED CORP (4)· patent assignee history

2012–2019Patents assigned to GORCZYCA THOMAS BERT (8)· patent assignee history

2012–2019Patents assigned to MCCONNELEE PAUL ALAN (6)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
GEN ELECTRIC	53	1982–2020
GORCZYCA THOMAS BERTself	8	2012–2019
MCCONNELEE PAUL ALAN	6	2012–2019
LOCKHEED CORP	4	2001–2004
MARTIN MARIETTA CORP	3	1996–1998

Locations

Location	Patents	Span
Schenectady, New York, US	59	1982–2020
Schnectady, New York, US	1	1996