Inventor
SHIGEKI TOMISHIMA
Inventor
US
Overview
Patents· 15 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores27%
G06FElectric digital data processing20%
G06NComputing arrangements based on specific computational models11%
H10BElectronic memory devices11%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h109%
H01LSemiconductor devices7%
H10DInorganic electric semiconductor devices5%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use5%
H03MCoding2%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h102%
PatentTitleYear
12,340,863Stacked memory chip solution with reduced package inputs/outputs (I/Os)202512,191,135Two transistor gain cell memory with indium gallium zinc oxide202512,182,455Data processing near data storage202412,087,352Techniques to couple high bandwidth memory device on silicon substrate and package substrate202411,868,665Data processing near data storage202411,776,619Techniques to couple high bandwidth memory device on silicon substrate and package substrate202311,687,404Technologies for preserving error correction capability in compute-in-memory operations202311,620,358Technologies for performing macro operations in memory202311,557,333Techniques to couple high bandwidth memory device on silicon substrate and package substrate202311,456,281Architecture and processes to enable high capacity memory packages through memory die stacking202211,301,167Technologies for providing multiple tier memory media management202211,262,954Data processing near data storage202211,237,903Technologies for providing ECC pre-provisioning and handling for cross-point memory and compute operations202211,182,242Technologies for preserving error correction capability in compute-in-memory operations202111,182,158Technologies for providing adaptive memory media management2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2025Patents assigned to INTEL CORP (12)· patent assignee history
2021–2025Based in US· patent location history
2023–2024Patents assigned to TAHOE RES LTD (3)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 12 | 2021–2025 |
| TAHOE RES LTD | 3 | 2023–2024 |
Locations
| Location | Patents | Span |
|---|---|---|
| US | 15 | 2021–2025 |