Inventor
Shoichi Shimizu
Inventor
Fujisawa, JP
Overview
Patents· 21 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H03Kprimary
H03KPulse technique12%
G06FElectric digital data processing7%
G11BInformation storage based on relative movement between record carrier and transducer7%
C12PFermentation or enzyme-using processes to synthesise a desired chemical compound or composition or to separate optical isomers from a racemic mixture5%
G05FSystems for regulating electric or magnetic variables5%
H03MCoding5%
B01DSeparation2%
B60QArrangement of signalling or lighting devices, the mounting or supporting thereof or circuits therefor, for vehicles in general2%
B60RVehicles, vehicle fittings, or vehicle parts, not otherwise provided for2%
B60TVehicle brake control systems or parts thereof2%
PatentTitleYear
10,789,850Obstacle detection device, driving assistance system, and obstacle detection method20209,946,329Electronic apparatus20187,339,120'Electromagnetic wave shield'20087,079,084'Antenna element, loop antenna using the antenna element, and communications control apparatus using the antenna for wireless communications medium'20066,245,306'Method for purification of exhaust gas'20016,075,664'Write current setting method, and recording and reproducing device'20005,993,624'Carbon dioxide gas sensor'19995,886,844'Magnetic disk apparatus and read waveform equalizing method using stored tap coefficients for a transversal filter'19995,767,702'Switched pull down emitter coupled logic circuits'19985,638,225'Magnetic disc apparatus'19975,204,553'Field effect transistor circuit'19935,160,858'Field-effect transistor circuit'19925,100,787'Method for preparing highly purified phosphatidylinositol'19925,024,942'Biochemical process for reacting hydrophobic and hydrophilic substrates and apparatus therefor'19914,926,451'Timing controller for high-speed digital integrated circuit'19904,897,565'Logic circuit using Schottky barrier FETs'19904,816,831'Analog-digital converter realizing high integation with high resolution ability'19894,740,907'Full adder circuit using differential transistor pairs'19884,542,370'Cascade-comparator A/D converter'19854,491,747'Logic circuit using depletion mode field effect switching transistors'19854,023,053'Variable capacity diode device'1977Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1977–1985Patents assigned to TOKYO SHIBAURA ELECTRIC CO (3)· patent assignee history
1985–1998Based in Fujisawa, JP· patent location history
1988–2018Patents assigned to TOSHIBA KK (8)· patent assignee history
1992Based in Nagoya, JP· patent location history
1997–2000Patents assigned to FUJITSU LTD (3)· patent assignee history
1997–2018Based in Kawasaki, JP· patent location history
1999–2008Patents assigned to MATSUSHITA ELECTRIC INDUSTRIAL CO LTD (4)· patent assignee history
1999–2008Based in Fukuoka, JP· patent location history
2020Patents assigned to MITSUBISHI ELECTRIC CORP (1)· patent assignee history
2020Based in Tokyo, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TOSHIBA KK | 8 | 1988–2018 |
| MATSUSHITA ELECTRIC INDUSTRIAL CO LTD | 4 | 1999–2008 |
| FUJITSU LTD | 3 | 1997–2000 |
| TOKYO SHIBAURA ELECTRIC CO | 3 | 1977–1985 |
| MITSUBISHI ELECTRIC CORP | 1 | 2020 |
Locations
| Location | Patents | Span |
|---|---|---|
| Fujisawa, JP | 9 | 1985–1998 |
| Kawasaki, JP | 4 | 1997–2018 |
| Fukuoka, JP | 4 | 1999–2008 |
| Tokyo, JP | 1 | 2020 |
| Nagoya, JP | 1 | 1992 |