Inventor
CHIH-YU HSU
Inventor
TW
Overview
Patents· 22 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices29%
H01LSemiconductor devices25%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1015%
B82YSpecific uses or applications of nanostructures9%
H10BElectronic memory devices7%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h106%
C01BNon-metallic elements1%
C01PIndexing scheme relating to structural and physical aspects of solid inorganic compounds1%
C09KMaterials for miscellaneous applications, not provided for elsewhere1%
G06FElectric digital data processing1%
PatentTitleYear
12,463,040Methods for doping high-K metal gates for tuning threshold voltages202512,453,165P-type semiconductor devices with different threshold voltages and methods of forming the same202512,433,011Post gate dielectric processing for semiconductor device fabrication202512,302,604Multi-gate device and related methods202512,294,030Nano-sheet-based complementary metal-oxide-semiconductor devices with asymmetric inner spacers202512,272,557Semiconductor device and method202512,255,104Semiconductor device and method of manufacture202512,171,091Multi-layer high-k gate dielectric structure202412,142,657Gate structure for multi-gate device and related methods202412,106,940Systems and methods for storage and supply of F3NO-free FNO gases and F3NO-free FNO gas mixtures for semiconductor processes202412,074,206Integrated circuit device with improved reliability202412,040,405Multi-gate device and related methods202412,041,760Multi-layer high-k gate dielectric structure202412,040,235Semiconductor device and method of manufacture202412,022,643Multi-layer high-k gate dielectric structure202411,996,484Nano-sheet-based complementary metal-oxide-semiconductor devices with asymmetric inner spacers202411,862,468Semiconductor device and method202411,735,484Post gate dielectric processing for semiconductor device fabrication202311,450,661Forming STI regions to separate semiconductor Fins202211,437,280Semiconductor device and method of manufacture202211,342,188Methods for doping high-k metal gates for tuning threshold voltages202211,281,516Error handling method and associated error handling architecture for transmission interfaces2022Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2022–2025Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (20)· patent assignee history
2022Patents assigned to REALTEK SEMICONDUCTOR CORP (1)· patent assignee history
2022–2025Based in TW· patent location history
2024Patents assigned to AIR LIQUIDE (1)· patent assignee history
2024Based in JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 20 | 2022–2025 |
| AIR LIQUIDE | 1 | 2024 |
| REALTEK SEMICONDUCTOR CORP | 1 | 2022 |
Locations
| Location | Patents | Span |
|---|---|---|
| TW | 21 | 2022–2025 |
| JP | 1 | 2024 |