Inventor
DAN BAUM
Inventor
IL
Overview
Patents· 36 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing77%
G06NComputing arrangements based on specific computational models19%
G06TImage data processing or generation, in general2%
H04LTransmission of digital information, e.g. telegraphic communication2%
PatentTitleYear
12,536,020Systems, methods, and apparatuses for tile store202612,461,745Systems for performing instructions to quickly convert and use tiles as 1D vectors202512,314,717Systems, methods, and apparatuses for dot production operations202512,287,843Systems and methods of instructions to accelerate multiplication of sparse matrices using bitmasks that identify non-zero elements202512,282,773Systems, methods, and apparatus for tile configuration202512,277,234Cryptographic computing in multitenant environments202512,265,826Systems for performing instructions to quickly convert and use tiles as 1D vectors202512,260,213Systems, methods, and apparatuses for matrix add, subtract, and multiply202512,182,571Systems, methods, and apparatuses for tile load, multiplication and accumulation202412,175,246Systems and methods for performing matrix compress and decompress instructions202412,147,804Systems, methods, and apparatuses for tile matrix multiplication and accumulation202412,124,847Systems, methods, and apparatuses for tile transpose202412,106,100Systems, methods, and apparatuses for matrix operations202412,039,332Systems, methods, and apparatus for matrix move202412,032,48564-bit virtual addresses having metadata bit(s) and canonicality check that does not fail due to non-canonical values of metadata bit(s)202411,977,886Systems, methods, and apparatuses for tile store202411,954,489Systems for performing instructions to quickly convert and use tiles as 1D vectors202411,886,875Systems and methods for performing nibble-sized operations on matrix elements202411,847,185Systems and methods of instructions to accelerate multiplication of sparse matrices using bitmasks that identify non-zero elements202311,847,452Systems, methods, and apparatus for tile configuration202311,748,103Systems and methods for performing matrix compress and decompress instructions202311,714,642Systems, methods, and apparatuses for tile store202311,714,648Systems for performing instructions to quickly convert and use tiles as 1D vectors202311,579,880Systems for performing instructions to quickly convert and use tiles as 1D vectors202311,579,883Systems and methods for performing horizontal tile operations202311,567,765Systems, methods, and apparatuses for tile load202311,507,376Systems for performing instructions for fast element unpacking into 2-dimensional registers202211,422,809Apparatus and method for multicasting a cache line update using delayed refetch messages202211,327,754Method and apparatus for approximation using polynomials202211,294,671Systems and methods for performing duplicate detection instructions on 2D data202211,288,068Systems, methods, and apparatus for matrix move202211,288,069Systems, methods, and apparatuses for tile store202211,263,008Systems, methods, and apparatuses for tile broadcast202211,249,761Systems and methods for performing matrix compress and decompress instructions202211,200,055Systems, methods, and apparatuses for matrix add, subtract, and multiply202111,163,565Systems, methods, and apparatuses for dot production operations2021Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2021–2026Patents assigned to INTEL CORP (36)· patent assignee history
2021–2026Based in IL· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 36 | 2021–2026 |
Locations
| Location | Patents | Span |
|---|---|---|
| IL | 36 | 2021–2026 |