Inventor
Stephen A. St. Onge
Inventor
Colchester, VT, US
Overview
Patents· 32 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices55%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1026%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1011%
G06FElectric digital data processing4%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests4%
PatentTitleYear
8,640,077'Capturing mutual coupling effects between an integrated circuit chip and chip package'20148,466,501'Asymmetric silicon-on-insulator (SOI) junction field effect transistor (JFET) and a method of forming the asymmetrical SOI JFET'20138,030,167'Varied impurity profile region formation for varying breakdown voltage of devices'20117,868,423'Optimized device isolation'20117,709,930'Tuneable semiconductor device with discontinuous portions in the sub-collector'20107,701,015'Bipolar and CMOS integration with reduced contact height'20107,550,787'Varied impurity profile region formation for varying breakdown voltage of devices'20097,317,240'Redundant interconnect high current bipolar device and method of forming the device'20087,253,096'Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same'20077,002,221'Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same'20066,998,699'Redundant interconnect high current bipolar device and method of forming the device'20066,900,519'Diffused extrinsic base and method for fabrication'20056,869,854'Diffused extrinsic base and method for fabrication'20056,833,299'Method of fabricating a stacked poly-poly and MOS capacitor using a sige integration scheme'20046,812,545'Epitaxial base bipolar transistor with raised extrinsic base'20046,657,280'Redundant interconnect high current bipolar device'20036,635,548'Capacitor and method for forming same'20036,617,220'Method for fabricating an epitaxial base bipolar transistor with raised extrinsic base'20036,600,199'Deep trench-buried layer array and integrated device structures for noise isolation and latch up immunity'20036,597,050'Method of contacting a silicide-based schottky diode and diode so formed'20036,507,063'Poly-poly/MOS capacitor having a gate encapsulating first electrode layer'20036,476,483'Method and apparatus for cooling a silicon on insulator device'20026,452,251'Damascene metal capacitor'20026,448,124'Method for epitaxial bipolar BiCMOS'20026,440,811'Method of fabricating a poly-poly capacitor with a SiGe BiCMOS integration scheme'20026,420,747'MOSCAP design for improved reliability'20026,384,468'Capacitor and method for forming same'20026,329,690'Method and apparatus to match semiconductor device performance'20016,258,695'Dislocation suppression by carbon incorporation'20016,121,122'Method of contacting a silicide-based schottky diode'20006,096,618'Method of making a Schottky diode with sub-minimum guard ring'20005,882,977'Method of forming a self-aligned, sub-minimum isolation ring'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2014Patents assigned to IBM (32)· patent assignee history
1999–2003Based in Essex Junction, VT, US· patent location history
2001–2014Based in Colchester, VT, US· patent location history
2005Based in Coichester, VT, US· patent location history
2013–2014Patents assigned to ST ONGE STEPHEN A (2)· patent assignee history
2013Patents assigned to HERSHBERGER DOUGLAS B (1)· patent assignee history
2014Patents assigned to GROVES ROBERT A (1)· patent assignee history
2014Patents assigned to NI WAN (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 32 | 1999–2014 |
| ST ONGE STEPHEN Aself | 2 | 2013–2014 |
| GROVES ROBERT A | 1 | 2014 |
| HERSHBERGER DOUGLAS B | 1 | 2013 |
| NI WAN | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Colchester, VT, US | 25 | 2001–2014 |
| Essex Junction, VT, US | 6 | 1999–2003 |
| Coichester, VT, US | 1 | 2005 |