Inventor

Chris Karabatsos

Inventor
Kingston, NY, US

Overview

27→
Patents
1988–2014
Patent span
Electricity
Primary field (CPC H)

Patents· 27 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary
G06FElectric digital data processing23%
H05KPrinted circuits19%
H03KPulse technique16%
G11CStatic stores12%
H01RElectrically-conductive connections9%
F02BInternal-combustion piston engines7%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h105%
F16CShafts2%
G09GArrangements or circuits for control of indicating devices using static means to present variable information2%
H04LTransmission of digital information, e.g. telegraphic communication2%
PatentTitleYear
8,757,125'Engine crankshaft and method of use'20148,381,699'Engine crankshaft and method of use'20138,134,412'Synchronization of a data output signal to an input clock'20128,069,318'High performance data rate system for flash devices'20118,061,326'Four cycle engine with load crank'20118,040,683'Active dual in line memory module connector with re-driven propagated signals'20118,034,657'Chip packaging with metal frame pin grid array'20117,606,992'High performance data rate system for flash devices'20097,605,666'High frequency digital oscillator-on-demand with synchronization'20097,563,649'Chip packaging with metal frame pin grid array'20097,561,651'Synchronization of a data output signal to a clock input'20097,539,024'Active dual in line memory module connector with re-driven propagated signals'20097,498,887'High frequency digital oscillator-on-demand with synchronization'20097,276,982'High frequency digital oscillator-on-demand with synchronization'20077,205,789'Termination arrangement for high speed data rate multi-drop data bit connections'20077,193,444'High speed data bit latch circuit'20076,854,042'High-speed data-rate converting and switching circuit'20056,737,891'Tri-directional, high-speed bus switch'20046,446,158'Memory system using FET switches to select memory banks'20026,392,162'Double-sided flexible jumper assembly and method of manufacture'20026,266,252'Apparatus and method for terminating a computer memory bus'20015,953,215'Apparatus and method for improving computer memory speed and capacity'19995,949,657'Bottom or top jumpered foldable electronic assembly'19995,469,330'Heat sink header assembly'19955,224,023'Foldable electronic assembly module'19934,787,025'Remote fan out facility for data terminals'19884,764,893'Noise-immune interrupt level sharing'1988

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1988Patents assigned to IBM (2)· patent assignee history
1988–2014Based in Kingston, NY, US· patent location history
1993–2014Patents assigned to KARABATSOS CHRIS (15)· patent assignee history
1993Patents assigned to SMITH GARY W (1)· patent assignee history
2011–2012Patents assigned to URENSCHI ASSETS LTD LIABILITY COMPANY (4)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
KARABATSOS CHRISself151993–2014
URENSCHI ASSETS LTD LIABILITY COMPANY42011–2012
IBM21988
SMITH GARY W11993
Locations
LocationPatentsSpan
Kingston, New York, US271988–2014