Inventor
Kensuke Okonogi
Inventor
Tokyo, JP
Overview
Patents· 26 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Pprimary
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1033%
H10DInorganic electric semiconductor devices22%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1019%
H10BElectronic memory devices11%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests11%
Y10TTechnical subjects covered by former us classification3%
H01LSemiconductor devices2%
PatentTitleYear
9,236,387'Semiconductor device and manufacturing method thereof'20168,704,299'Semiconductor device and manufacturing method thereof'20148,674,455'Semiconductor device'20147,846,826'Method of manufacturing a semiconductor device with multilayer sidewall'20107,737,505'Semiconductor device and method of forming the same'20107,700,431'Method for manufacturing a semiconductor device having polysilicon plugs'20107,666,761'Semiconductor device and manufacturing method thereof'20107,632,696'Semiconductor chip with a porous single crystal layer and manufacturing method of the same'20097,338,876'Method for manufacturing a semiconductor device'20087,186,632'Method of fabricating a semiconductor device having a decreased concentration of phosphorus impurities in polysilicon'20077,151,033'Method for manufacturing a semiconductor device having a low junction leakage current'20067,129,141'Method for manufacturing a semiconductor device having a low junction leakage current'20066,448,157'Fabrication process for a semiconductor device'20026,323,109'Laminated SOI substrate and producing method thereof'20016,057,036'Semiconductor substrate having a serious effect of gettering heavy metal and method of manufacturing the same'20006,004,406'Silicon on insulating substrate'19995,970,366'Method of removing metallic contaminants from simox substrate'19995,872,388'Semiconductor device and method for fabricating the same'19995,849,102'Method of cleaning a surface of a semiconductor substrate by a heat treatment in an inert gas atmosphere'19985,798,294'Semiconductor substrate having a serious effect of gettering heavy metal and method of manufacturing the same'19985,773,152'SOI substrate having a high heavy metal gettering effect for semiconductor device'19985,726,089'Semiconductor device and method for fabricating the same'19985,691,231'Method of manufacturing silicon on insulating substrate'19975,529,947'Semiconductor device with clad substrate and fabrication process therefor'19965,420,064'Method of manufacturing a dielectric isolation substrate'19955,374,582'Laminated substrate for semiconductor device and manufacturing method thereof'1994Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1994–2002Patents assigned to NEC CORP (14)· patent assignee history
1994–2016Based in Tokyo, JP· patent location history
2006–2014Patents assigned to ELPIDA MEMORY INC (10)· patent assignee history
2014Patents assigned to NOJIMA KAZUHIRO (1)· patent assignee history
2014Patents assigned to OKONOGI KENSUKE (1)· patent assignee history
2014Patents assigned to OYU KIYONORI (1)· patent assignee history
2014Based in Chuo-ku, JP· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NEC CORP | 14 | 1994–2002 |
| ELPIDA MEMORY INC | 10 | 2006–2014 |
| NOJIMA KAZUHIRO | 1 | 2014 |
| OKONOGI KENSUKEself | 1 | 2014 |
| OYU KIYONORI | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Tokyo, JP | 25 | 1994–2016 |
| Chuo-ku, JP | 1 | 2014 |