Inventor
Richard J. Wong
Inventor
Milpitas, CA, US
Overview
Patents· 22 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1040%
G11CStatic stores13%
H03KPulse technique13%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests13%
LOC237%
G01NInvestigating or analysing materials by determining their chemical or physical properties3%
G01RMeasuring electric variables3%
H10DInorganic electric semiconductor devices3%
LOC073%
PatentTitleYear
D0838822Toilet seat2019D0838821Toilet seat20199,869,643'Masks that selectively attentuate radiation for inspection of printed circuit boards'2018D0697767'Pair of chopsticks'20148,547,155'Soft error robust low power latch device layout techniques'20137,187,228'Method of programming an antifuse'20076,577,017'Bond pad having vias usable with antifuse process technology'20036,377,062'Floating interface for integrated circuit test head'20026,300,688'Bond pad having vias usable with antifuse process technology'20016,140,837'Charge pumps of antifuse programming circuitry powered from high voltage compatibility terminal'20006,097,077'Programmable interconnect structures and programmable integrated circuits'20006,028,444'Three-statable net driver for antifuse field programmable gate array'20005,880,512'Programmable interconnect structures and programmable integrated circuits'19995,786,268'Method for forming programmable interconnect structures and programmable integrated circuits'19985,701,027'Programmable interconnect structures and programmable integrated circuits'19975,661,412'Reducing programming time of a field programmable gate array employing antifuses'19975,557,136'Programmable interconnect structures and programmable integrated circuits'19965,544,070'Programmed programmable device and method for programming antifuses of a programmable device'19965,362,676'Programmable interconnect structures and programmable integrated circuits'19945,319,238'Programmable interconnect structures and programmable integrated circuits'19945,293,133'Method of determining an electrical characteristic of an antifuse and apparatus therefor'19945,196,724'Programmable interconnect structures and programmable integrated circuits'1993Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1993–2007Patents assigned to QUICKLOGIC CORP (15)· patent assignee history
1993–2003Based in Milpitas, CA, US· patent location history
2000–2018Based in Saratoga, CA, US· patent location history
2002Patents assigned to CREDENCE SYSTEMS CORP (1)· patent assignee history
2002Based in San Jose, CA, US· patent location history
2013–2018Patents assigned to CISCO TECH INC (2)· patent assignee history
2013Patents assigned to HOLST JOHN C (1)· patent assignee history
2014–2019Patents assigned to WONG RICHARD (3)· patent assignee history
2014Based in San Francisco, CA, US· patent location history
2019Based in Bethesda, MD, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| QUICKLOGIC CORP | 15 | 1993–2007 |
| WONG RICHARDself | 3 | 2014–2019 |
| CISCO TECH INC | 2 | 2013–2018 |
| CREDENCE SYSTEMS CORP | 1 | 2002 |
| HOLST JOHN C | 1 | 2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Milpitas, California, US | 13 | 1993–2003 |
| Saratoga, California, US | 5 | 2000–2018 |
| Bethesda, Maryland, US | 2 | 2019 |
| San Francisco, California, US | 1 | 2014 |
| San Jose, California, US | 1 | 2002 |