Inventor
Jeong-Ho Bang
Inventor
Kyungki-do, KR
Overview
Patents· 40 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G01Rprimary
G01RMeasuring electric variables25%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1019%
G11CStatic stores13%
H04NPictorial communication, e.g. television8%
G09GArrangements or circuits for control of indicating devices using static means to present variable information7%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%
H10DInorganic electric semiconductor devices4%
G06FElectric digital data processing3%
H03KPulse technique3%
A23LFoods, foodstuffs or non-alcoholic beverages, not otherwise provided for1%
PatentTitleYear
9,426,890'Display apparatus'20168,018,899'Handoff system and method between different kinds of devices, SIP server and operational method of SIP server'20117,602,172'Test apparatus having multiple head boards at one handler and its test method'20097,492,032'Fuse regions of a semiconductor memory device and methods of fabricating the same'20097,438,563'Connector for testing a semiconductor package'20087,408,339'Test system of semiconductor device having a handler remote control and method of operating the same'20087,378,864'Test apparatus having multiple test sites at one handler and its test method'20087,327,154'Multichip package test'20087,254,757'Flash memory test system and method capable of test time reduction'20077,230,417'Test system of semiconductor device having a handler remote control and method of operating the same'20077,227,351'Apparatus and method for performing parallel test on integrated circuit devices'20077,084,655'Burn-in test apparatus for BGA packages using forced heat exhaust'20067,017,428'Test kit for semiconductor package and method for testing semiconductor package using the same'20066,960,908'Method for electrical testing of semiconductor package that detects socket defects in real time'20056,943,577'Multichip package test'20056,922,050'Method for testing a remnant batch of semiconductor devices'20056,903,567'Test apparatus having multiple test sites at one handler and its test method'20056,879,541'Integrated circuit with improved output control signal and method for generating improved output control signal'20056,861,682'Laser link structure capable of preventing an upper crack and broadening an energy window of a laser beam, and fuse box using the same'20056,850,450'Fuse box including make-link and redundant address decoder having the same, and method for repairing defective memory cell'20056,841,425'Wafer treatment method for protecting fuse box of semiconductor chip'20056,842,031'Method of electrically testing semiconductor devices'20056,813,195'Pipe latch circuit for outputting data with high speed'20046,710,550'Plasma display panel apparatus and method of protecting an over current thereof'20046,700,337'Apparatus for generating dynamic focus signal'20046,686,929'Broadband switching drive compensating circuit for a video display device'20046,507,801'Semiconductor device testing system'20036,489,790'Socket including pressure conductive rubber and mesh for testing of ball grid array package'20026,462,534'Semiconductor package testing equipment including loader having package guider and method of loading a semiconductor package onto a test socket as aligned therewith'20026,373,309'Duty cycle compensation circuit of delay locked loop for Rambus DRAM'20026,337,695'Circuit for controlling a contrast level and compensating a brightness level of a video display apparatus and method therefor'20026,201,746'Test method for high speed memory devices in which limit conditions for the clock are defined'20016,183,589'Method for manufacturing lead-on-chip (LOC) semiconductor packages using liquid adhesive applied under the leads'20016,121,118'Chip separation device and method'20006,005,357'Vertical oscillation circuit for display device'19995,942,861'Front/back porch voltage-regulator of vertical focus control signal'19995,940,413'Method for detecting operational errors in a tester for semiconductor devices'19995,870,086'Power saving display device and method for controlling power thereof'19995,780,978'Vertical focusing circuit'19985,621,625'Surge protection circuit for a switching mode power supply'1997Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1997–2016Patents assigned to SAMSUNG ELECTRONICS CO LTD (37)· patent assignee history
1997–2011Based in Suwon-si, KR· patent location history
1999–2009Based in Kyungki-do, KR· patent location history
2002Patents assigned to HYUNDAI ELECTRONICS IND (1)· patent assignee history
2004–2005Patents assigned to HYNIX SEMICONDUCTOR INC (2)· patent assignee history
2004–2005Based in Ichon-shi, KR· patent location history
2005–2008Based in Gyeonggi-do, KR· patent location history
2005Based in Yongin, KR· patent location history
2008Patents assigned to ISC TECHNOLOGY CO LTD (1)· patent assignee history
2011Patents assigned to KOREA ADVANCED INST SCI & TECH (1)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| SAMSUNG ELECTRONICS CO LTD | 37 | 1997–2016 |
| HYNIX SEMICONDUCTOR INC | 2 | 2004–2005 |
| HYUNDAI ELECTRONICS IND | 1 | 2002 |
| ISC TECHNOLOGY CO LTD | 1 | 2008 |
| KOREA ADVANCED INST SCI & TECH | 1 | 2011 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kyungki-do, KR | 12 | 1999–2009 |
| Suwon-si, KR | 8 | 1997–2011 |
| Gyeonggi-do, KR | 7 | 2005–2008 |
| Ichon-shi, KR | 2 | 2004–2005 |
| Yongin, KR | 2 | 2005 |