Inventor
Janos Fucsko
Inventor
Boise, ID, US
Overview
Patents· 41 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1025%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1024%
H10DInorganic electric semiconductor devices11%
H10BElectronic memory devices11%
H01LSemiconductor devices7%
B81BMicrostructural devices or systems, e.g. micromechanical devices4%
B81CProcesses or apparatus specially adapted for the manufacture or treatment of microstructural devices or systems4%
C09KMaterials for miscellaneous applications, not provided for elsewhere4%
C30BSingle-crystal growth4%
C03CChemical composition of glasses, glazes or vitreous enamels3%
PatentTitleYear
10,622,442Electronic systems and methods of forming semiconductor constructions202010,170,545Memory arrays20199,929,233'Memory arrays'20189,559,163'Memory arrays'20179,040,424'Methods of forming single crystal silicon structures and semiconductor device structures including single crystal silicon structures'20158,969,217'Methods of treating semiconductor substrates, methods of forming openings during semiconductor fabrication, and methods of removing particles from over semiconductor substrates'20158,962,446'Methods of forming oxides, methods of forming semiconductor constructions, and methods of forming isolation regions'20158,829,643'Memory arrays'20148,669,144'Methods of forming memory arrays'20148,586,483'Semiconductor device structures and compositions for forming same'20138,575,040'Low temperature process for polysilazane oxidation/densification'20138,513,064'Methods of forming memory arrays'20138,492,288'Methods of treating semiconductor substrates, methods of forming openings during semiconductor fabrication, and methods of removing particles from over semiconductor substrates'20138,450,214'Methods of etching single crystal silicon'20138,294,246'Semiconductor structures including square cuts in single crystal silicon and method of forming same'20128,288,213'Methods of forming memory arrays'20128,283,259'Methods of removing a metal nitride material'20128,159,050'Single crystal silicon structures'20128,158,967'Integrated memory arrays'20128,124,545'Methods of etching oxide, reducing roughness, and forming capacitor constructions'20127,973,388'Semiconductor structures including square cuts in single crystal silicon'20117,935,602'Semiconductor processing methods'20117,892,942'Methods of forming semiconductor constructions, and methods of forming isolation regions'20117,811,897'Method of forming trench isolation'20107,772,672'Semiconductor constructions'20107,713,885'Methods of etching oxide, reducing roughness, and forming capacitor constructions'20107,709,341'Methods of shaping vertical single crystal silicon walls and resulting structures'20107,699,998'Method of substantially uniformly etching non-homogeneous substrates'20107,629,266'Etch compositions and methods of processing a substrate'20097,628,932'Wet etch suitable for creating square cuts in si'20097,557,420'Low temperature process for polysilazane oxidation/densification'20097,521,378'Low temperature process for polysilazane oxidation/densification'20097,491,650'Etch compositions and methods of processing a substrate'20097,439,157'Isolation trenches for memory devices'20087,316,981'Method of removing silicon from a substrate'20087,273,796'Methods of forming trench isolation in the fabrication of integrated circuitry and methods of fabricating integrated circuitry'20077,205,245'Method of forming trench isolation within a semiconductor substrate'20077,166,539'Wet etching method of removing silicon from a substrate'20077,135,381'Wet etching method of removing silicon from a substrate and method of forming trench isolation'20067,030,034'Methods of etching silicon nitride substantially selectively relative to an oxide of aluminum'20066,790,786'Etching processes for integrated circuit manufacturing including methods of forming capacitors'2004Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2004–2020Patents assigned to MICRON TECHNOLOGY INC (41)· patent assignee history
2004–2015Based in Boise, ID, US· patent location history
2012–2015Patents assigned to FUCSKO JANOS (14)· patent assignee history
2012–2015Patents assigned to LEE WHONCHEE (4)· patent assignee history
2012–2015Patents assigned to WELLS DAVID H (4)· patent assignee history
2012–2013Patents assigned to TANG SANH D (3)· patent assignee history
2014–2020Based in Hatfield, PA, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| MICRON TECHNOLOGY INC | 41 | 2004–2020 |
| FUCSKO JANOSself | 14 | 2012–2015 |
| LEE WHONCHEE | 4 | 2012–2015 |
| WELLS DAVID H | 4 | 2012–2015 |
| TANG SANH D | 3 | 2012–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| Boise, ID, US | 35 | 2004–2015 |
| Hatfield, Pennsylvania, US | 6 | 2014–2020 |