Inventor
Hans Weber
Inventor
Bayerisch Gmain, DE
Overview
Patents· 91 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices39%
H01LSemiconductor devices24%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1019%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1010%
H03KPulse technique3%
C23CCoating metallic material1%
C23FNon-mechanical removal of metallic material from surface1%
C30BSingle-crystal growth1%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices1%
H10BElectronic memory devices1%
PatentTitleYear
10,879,350Method for forming a superjunction transistor device202010,811,529Transistor device with gate resistor202010,770,541Semiconductor device including super junction structure202010,679,855Method for producing a superjunction device202010,600,740Method of manufacturing a semiconductor device with epitaxial layers and an alignment mark202010,553,681Forming a superjunction transistor device202010,541,301SiC-based superjunction semiconductor device202010,411,126Semiconductor device having a first through contact structure in ohmic contact with the gate electrode201910,374,032Field-effect semiconductor device having N and P-doped pillar regions201910,319,810Semiconductor device including super junction structure201910,269,896Semiconductor wafer and method of manufacturing semiconductor devices in a semiconductor wafer201910,236,258Method of manufacturing a semiconductor device with epitaxial layers and an alignment mark201910,224,394Superjunction semiconductor device having a superstructure201910,211,300Method of forming a semiconductor device201910,128,328Method of manufacturing semiconductor devices and semiconductor device containing hydrogen-related donors201810,109,489Method for producing a superjunction device201810,074,715Semiconductor wafer, implantation apparatus for implanting protons and method for forming a semiconductor device20189,954,093Method of manufacturing a super junction semiconductor device and super junction semiconductor device20189,905,639'Method of manufacturing superjunction semiconductor devices with a superstructure in alignment with a foundation'20189,887,261'Charge compensation device and manufacturing therefor'20189,859,361'SiC-based superjunction semiconductor device'20189,825,165'Charge-compensation device'20179,711,357'Method of manufacturing a semiconductor device with epitaxial layers and an alignment structure'20179,704,984'Super-junction semiconductor device comprising junction termination extension structure and method of manufacturing'20179,704,954'Semiconductor device and a method for forming a semiconductor device'20179,653,540'Semiconductor wafer and method of manufacturing semiconductor devices in a semiconductor wafer'20179,627,471'Super junction semiconductor device having strip structures in a cell area'20179,577,034'Compensation devices'20179,570,576'Method for forming a semiconductor device having insulating parts or layers formed via anodic oxidation'20179,558,933'Method for forming a semiconductor device'20179,537,003'Semiconductor device with charge compensation'20179,530,764'Semiconductor arrangement with active drift zone'20169,484,400'Method of forming a super junction semiconductor device having stripe-shaped regions of the opposite conductivity types'20169,484,399'Charge compensation device and manufacturing therefor'20169,431,392'Electronic circuit having adjustable transistor device'20169,418,851'Method for manufacturing a semiconductor device'20169,391,149'Semiconductor device with self-charging field electrodes'20169,293,528'Field-effect semiconductor device and manufacturing therefor'20169,275,862'Compensation devices'20169,257,503'Superjunction semiconductor device and method for producing thereof'20169,257,448'Integrated semiconductor device having an insulating structure and a manufacturing method'20169,218,958'Method for forming a semiconductor device'20159,219,143'Semiconductor device and super junction semiconductor device having semiconductor mesas'20159,184,277'Super junction semiconductor device comprising a cell area and an edge area'20159,166,005'Semiconductor device with charge compensation structure'20159,147,763'Charge-compensation semiconductor device'20159,117,694'Super junction structure semiconductor device based on a compensation structure including compensation layers and a fill structure'20159,112,053'Method for producing a semiconductor device including a dielectric layer'20159,112,022'Super junction structure having a thickness of first and second semiconductor regions which gradually changes from a transistor area into a termination area'20159,105,717'Manufacturing a semiconductor device using electrochemical etching, semiconductor device and super junction semiconductor device'20159,070,580'Semiconductor device with a super junction structure based on a compensation structure with compensation layers and having a compensation rate gradient'20159,012,980'Method of manufacturing a semiconductor device including proton irradiation and semiconductor device including charge compensation structure'20158,975,688'Semiconductor device with voltage compensation structure'20158,901,642'Charge compensation semiconductor device'20148,901,717'Semiconductor device and manufacturing method'20148,866,221'Super junction semiconductor device comprising a cell area and an edge area'20148,866,222'Charge compensation semiconductor device'20148,866,253'Semiconductor arrangement with active drift zone'20148,823,084'Semiconductor device with charge compensation structure arrangement for optimized on-state resistance and switching losses'20148,803,205'Transistor with controllable compensation regions'20148,759,202'Semiconductor device and manufacturing method'20148,749,018'Integrated semiconductor device having an insulating structure and a manufacturing method'20148,742,550'Charge compensation semiconductor device'20148,716,788'Semiconductor device with self-charging field electrodes'20148,637,940'Semiconductor device with self-charging field electrodes and compensation regions'20148,633,095'Semiconductor device with voltage compensation structure'20148,421,196'Semiconductor device and manufacturing method'20138,399,325'Method for producing an electrode structure'20138,319,261'Semiconductor component structure with vertical dielectric layers'20128,288,230'Method for producing a gate electrode structure'20127,943,449'Semiconductor component structure with vertical dielectric layers'20117,923,330'Method for manufacturing a semiconductor device'20117,867,879'Method for dividing a semiconductor substrate and a method for producing a semiconductor circuit arrangement'20117,459,365'Method for fabricating a semiconductor component'2008RE040352'Switch mode power supply with reduced switching losses'20087,303,961'Method for producing a junction region between a trench and a semiconductor zone surrounding the trench'20077,193,293'Semiconductor component with a compensation layer, a depletion zone, and a complementary depletion zone, circuit configuration with the semiconductor component, and method of doping the compensation layer of the semiconductor component'20077,038,272'Method for forming a channel zone of a transistor and NMOS transistor'20066,960,798'High-voltage semiconductor component'20056,894,329'High-voltage semiconductor component'20056,870,201'High voltage resistant edge structure for semiconductor components'20056,833,298'Method for fabricating a semiconductor component having at least one transistor cell and an edge cell'20046,831,327'Vertically structured power semiconductor component'20046,828,609'High-voltage semiconductor component'20046,825,514'High-voltage semiconductor component'20046,819,089'Power factor correction circuit with high-voltage semiconductor component'20046,812,524'Field effect controlled semiconductor component'20046,667,514'Semiconductor component with a charge compensation structure and associated fabrication'20036,639,272'Charge compensation semiconductor configuration'20036,630,698'High-voltage semiconductor component'20036,388,287'Switch mode power supply with reduced switching losses'2002Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2002–2020Patents assigned to INFINEON TECHNOLOGIES AG (26)· patent assignee history
2002–2008Based in Ainring, DE· patent location history
2003–2005Based in Villach, AT· patent location history
2008–2016Patents assigned to INFINEON TECHNOLOGIES AUSTRIA (32)· patent assignee history
2011–2020Based in Bayerisch Gmain, DE· patent location history
2012–2015Patents assigned to WEBER HANS (14)· patent assignee history
2012–2015Patents assigned to HIRLER FRANZ (7)· patent assignee history
2016–2020Patents assigned to INFINEON TECHNOLOGIES AUSTRIA AG (30)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INFINEON TECHNOLOGIES AUSTRIA | 32 | 2008–2016 |
| INFINEON TECHNOLOGIES AUSTRIA AG | 30 | 2016–2020 |
| INFINEON TECHNOLOGIES AG | 26 | 2002–2020 |
| WEBER HANSself | 14 | 2012–2015 |
| HIRLER FRANZ | 7 | 2012–2015 |
Locations
| Location | Patents | Span |
|---|---|---|
| Bayerisch Gmain, DE | 73 | 2011–2020 |
| Ainring, DE | 12 | 2002–2008 |
| Villach, AT | 6 | 2003–2005 |