Inventor
John H. Epple
Inventor
Portland, OR, US
Overview
Patents· 5 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G11Cprimary
G11CStatic stores24%
H01LSemiconductor devices24%
H10BElectronic memory devices24%
H10NElectric solid-state devices not otherwise provided for24%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h106%
PatentTitleYear
10,644,064Logic chip including embedded magnetic tunnel junctions20209,997,563Logic chip including embedded magnetic tunnel junctions20189,660,181'Logic chip including embedded magnetic tunnel junctions'20179,041,146'Logic chip including embedded magnetic tunnel junctions'20157,407,863'Adhesive bonding with low temperature grown amorphous or polycrystalline compound semiconductors'2008Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2008Patents assigned to UNIV ILLINOIS (1)· patent assignee history
2008Based in St. Louis, MO, US· patent location history
2015–2020Patents assigned to INTEL CORP (4)· patent assignee history
2015–2020Based in Portland, OR, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INTEL CORP | 4 | 2015–2020 |
| UNIV ILLINOIS | 1 | 2008 |
Locations
| Location | Patents | Span |
|---|---|---|
| Portland, OR, US | 4 | 2015–2020 |
| St. Louis, MO, US | 1 | 2008 |