Inventor
Nicolas Nagel
Inventor
Kanagawa, JP
Overview
Patents· 39 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices33%
H10BElectronic memory devices32%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1014%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h109%
G11CStatic stores5%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
Y10TTechnical subjects covered by former us classification2%
H01GCapacitors1%
H01RElectrically-conductive connections1%
PatentTitleYear
8,009,477'Integrated circuit and method of forming an integrated circuit'20117,935,608'Storage cell having a T-shaped gate electrode and method for manufacturing the same'20117,838,921'Memory cell arrangements'20107,790,516'Method of manufacturing at least one semiconductor component and memory cells'20107,778,073'Integrated circuit having NAND memory cell strings'20107,714,377'Integrated circuits and methods of manufacturing thereof'20107,662,721'Hard mask layer stack and a method of patterning'20107,577,010'Integrated circuits, methods for manufacturing integrated circuits, integrated memory arrays'20097,521,351'Method for forming a semiconductor product and semiconductor product'20097,462,038'Interconnection structure and method of manufacturing the same'20087,416,976'Method of forming contacts using auxiliary structures'20087,378,700'Self-aligned V0-contact for cell size reduction'20087,320,934'Method of forming a contact in a flash memory device'20087,319,270'Multi-layer electrode and method of forming the same'20087,270,884'Adhesion layer for Pt on SiO2'20077,199,002'Process for fabrication of a ferroelectric capacitor'20077,061,035'Self-aligned V0-contact for cell size reduction'20067,041,551'Device and a method for forming a capacitor device'20067,042,705'Sidewall structure and method of fabrication for reducing oxygen diffusion to contact plugs during CW hole reactive ion etch processing'20067,042,037'Semiconductor device'20067,009,230'Barrier stack with improved barrier properties'20066,946,735'Side-wall barrier structure and method of fabrication'20056,940,111'Radiation protection in integrated circuits'20056,858,492'Method for fabricating a semiconductor memory device'20056,839,220'Multi-layer barrier allowing recovery anneal for ferroelectric capacitors'20056,818,503'Method for fabricating a semiconductor memory device'20046,815,234'Reducing stress in integrated circuits'20046,794,705'Multi-layer Pt electrode for DRAM and FRAM with high K dielectric materials'20046,787,831'Barrier stack with improved barrier properties'20046,773,986'Method for fabricating a semiconductor memory device'20046,704,219'FeRAM memory and method for manufacturing it'20046,621,683'Memory cells with improved reliability'20036,614,642'Capacitor over plug structure'20036,583,507'Barrier for capacitor over plug structures'20036,573,542'Capacitor electrodes arrangement with oxygen iridium between silicon and oxygen barrier layer'20036,358,855'Clean method for recessed conductive barriers'20026,011,284'Electronic material, its manufacturing method, dielectric capacitor, nonvolatile memory and semiconductor device'20005,994,153'Fabrication process of a capacitor structure of semiconductor memory cell'19995,864,153'Capacitor structure of semiconductor memory cell and fabrication process thereof'1999Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1999–2000Patents assigned to SONY CORP (3)· patent assignee history
1999–2008Based in Kanagawa, JP· patent location history
2002–2010Patents assigned to INFINEON TECHNOLOGIES AG (23)· patent assignee history
2002–2007Patents assigned to IBM (2)· patent assignee history
2002Based in Munich, DE· patent location history
2003–2006Patents assigned to TOSHIBA KK (4)· patent assignee history
2003–2008Based in Yokohama, JP· patent location history
2005–2011Based in Dresden, DE· patent location history
2008–2011Patents assigned to QIMONDA AG (8)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| INFINEON TECHNOLOGIES AG | 23 | 2002–2010 |
| QIMONDA AG | 8 | 2008–2011 |
| TOSHIBA KK | 4 | 2003–2006 |
| SONY CORP | 3 | 1999–2000 |
| IBM | 2 | 2002–2007 |
Locations
| Location | Patents | Span |
|---|---|---|
| Kanagawa, JP | 15 | 1999–2008 |
| Dresden, DE | 14 | 2005–2011 |
| Yokohama, JP | 9 | 2003–2008 |
| Munich, DE | 1 | 2002 |