Inventor
Yi-Tung Lin
Inventor
Taichung, TW
Overview
Patents· 4 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1033%
G01BMeasuring length, thickness or similar linear dimensions17%
G01RMeasuring electric variables17%
H01LSemiconductor devices17%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1017%
PatentTitleYear
11,073,551Method and system for wafer-level testing202110,903,179Semiconductor contact structure having stress buffer layer formed between under bump metal layer and copper pillar20217,585,754'Method of forming bonding pad opening'20096,772,528'Incremental offset measurement instrument'2004Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2004Patents assigned to NANYA TECHNOLOGY CORP (1)· patent assignee history
2004Based in Hsin-Chuang, TW· patent location history
2009Patents assigned to WINBOND ELECTRONICS CORP (1)· patent assignee history
2009Based in Taipei, TW· patent location history
2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (1)· patent assignee history
2021Patents assigned to UNITED MICROELECTRONICS CORP (1)· patent assignee history
2021Based in Taichung, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| NANYA TECHNOLOGY CORP | 1 | 2004 |
| TAIWAN SEMICONDUCTOR MFG CO LTD | 1 | 2021 |
| UNITED MICROELECTRONICS CORP | 1 | 2021 |
| WINBOND ELECTRONICS CORP | 1 | 2009 |
Locations
| Location | Patents | Span |
|---|---|---|
| Taichung, TW | 1 | 2021 |
| Taipei, TW | 1 | 2009 |
| Hsin-Chuang, TW | 1 | 2004 |