Inventor

Michael S. Schlansker

Inventor

Los Altos, CA, US

Overview

64→

Patents

1994–2021

Patent span

Physics

Primary field (CPC G)

Patents· 64 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing66%

H04LTransmission of digital information, e.g. telegraphic communication23%

G02BOptical elements, systems or apparatus3%

H04QSelecting3%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use3%

H03KPulse technique1%

H04BTransmission1%

PatentTitleYear

10,887,213Path-synchronous performance monitoring of interconnection networks based on source code attribution2021 10,423,530Partial cache coherence2019 10,146,689Locally poll flag in multi processing node system to determine whether a resource is free to use for thread2018 10,009,285Resource allocator2018 9,871,749'Switch assembly'2018 9,794,171'Modification or addition to forwarding table based on address'2017 9,614,777'Flow control in a network'2017 9,584,373'Configurable Clos network'2017 9,170,377'Optical interconnect'2015 9,166,817'Load balancing'2015 9,161,105'Routing optical signals'2015 9,137,179'Memory-mapped buffers for network interface controllers'2015 9,007,895'Method for routing data packets in a fat tree network'2015 8,948,180'Routing encapsulated data packets onto selected VLANs'2015 8,909,872'Computer system with coherent interconnection'2014 8,811,398'Method for routing data packets using VLANs'2014 8,683,000'Virtual network interface system with memory management'2014 8,452,867'Systems and methods for network and server power management'2013 8,392,571'Method and system for allocating bandwidth'2013 8,391,174'Data packet routing'2013 8,364,874'Prioritized polling for virtual network interfaces'2013 8,131,814'Dynamic pinning remote direct memory access'2012 8,125,991'Network switch using managed addresses for fast route lookup'2012 8,086,706'System and method for self configuration of reconfigurable systems'2011 7,984,242'Program thread syncronization'2011 7,975,068'System and method for self configuration of reconfigurable systems'2011 7,962,656'Command encoding of data to enable high-level functions in computer networks'2011 7,912,998'DMA access systems and methods'2011 7,788,437'Computer system with network interface retransmit'2010 7,725,556'Computer system with concurrent direct memory access'2010 7,650,471'Head of queue cache for communication interfaces'2010 7,555,607'Program thread syncronization for instruction cachelines'2009 7,421,575'Configuring a physical platform in a reconfigurable data center'2008 7,296,136'Methods and systems for loading data from memory'2007 7,194,609'Branch reconfigurable systems and methods'2007 7,146,480'Configurable memory system'2006 7,086,038'System and method for creating systolic solvers'2006 7,024,538'Processor multiple function units executing cycle specifying variable length instruction block and using common target block address updated pointers'2006 7,013,449'Method of designing custom circuit device using scheduling clock cycles'2006 7,000,091'System and method for independent branching in systems with plural processing elements'2006 6,993,639'Processing instruction addressed by received remote instruction and generating remote instruction to respective output port for another cell'2006 6,982,570'Reconfigurable device'2006 6,952,816'Methods and apparatus for digital circuit design generation'2005 6,766,445'Storage system for use in custom loop accelerators and the like'2004 6,651,222'Automatic design of VLIW processors'2003 6,611,910'Method for processing branch operations'2003 6,581,187'Automatic design of VLIW processors'2003 6,457,173'Automatic design of VLIW instruction formats'2002 6,408,428'Automated design of processor systems using feedback from internal measurements of candidate systems'2002 6,385,757'Auto design of VLIW processors'2002 6,023,751'Computer system and method for evaluating predicates and Boolean expressions'2000 5,999,738'Flexible scheduling of non-speculative instructions'1999 5,920,716'Compiling a predicated code with direct analysis of the predicated code'1999 5,850,553'Reducing the number of executed branch instructions in a code sequence'1998 5,778,219'Method and system for propagating exception status in data registers and for detecting exceptions from speculative operations with non-speculative operations'1998 5,742,804'Instruction prefetch mechanism utilizing a branch predict instruction'1998 5,710,912'Method and apparatus for enabling a computer system to adjust for latency assumptions'1998 5,692,169'Method and system for deferring exceptions generated during speculative execution'1997 5,664,135'Apparatus and method for reducing delays due to branches'1997 5,615,386'Computer architecture for reducing delays due to branch instructions'1997 5,475,823'Memory processor that prevents errors when load instructions are moved in the execution sequence'1995 5,404,484'Cache system for reducing memory latency times'1995 5,293,631'Analysis and optimization of array variables in compiler for instruction level parallel processor'1994 5,276,826'Apparatus for transforming addresses to provide pseudo-random access to memory modules'1994

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1994–2002Patents assigned to HEWLETT PACKARD CO (16)· patent assignee history

1994–1995Based in Sunnyvale, CA, US· patent location history

1995–2021Based in Los Altos, CA, US· patent location history

2003–2015Patents assigned to HEWLETT PACKARD DEVELOPMENT CO (36)· patent assignee history

2011–2019Based in Palo Alto, CA, US· patent location history

2012–2017Patents assigned to SCHLANSKER MICHAEL (11)· patent assignee history

2013–2017Patents assigned to TOURRILHES JEAN (7)· patent assignee history

2017–2021Patents assigned to HEWLETT PACKARD ENTPR DEV LP (7)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
HEWLETT PACKARD DEVELOPMENT CO	36	2003–2015
HEWLETT PACKARD CO	16	1994–2002
SCHLANSKER MICHAELself	11	2012–2017
HEWLETT PACKARD ENTPR DEV LP	7	2017–2021
TOURRILHES JEAN	7	2013–2017

Locations

Location	Patents	Span
Los Altos, California, US	56	1995–2021
Palo Alto, California, US	5	2011–2019
Sunnyvale, California, US	3	1994–1995