Inventor
Meng-Kai Hsu
Inventor
Xinfeng Township, TW
Overview
Patents· 19 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing45%
G03FPhotomechanical production of textured or patterned surfaces, e.g. for printing, for processing of semiconductor devices12%
H01LSemiconductor devices10%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1010%
Y02PClimate change mitigation technologies in the production or processing of goods10%
H10DInorganic electric semiconductor devices7%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h105%
H10BElectronic memory devices2%
PatentTitleYear
11,062,076Method and system of generating a layout diagram202110,776,551Method and system of revising a layout diagram202010,713,410Method for legalizing mixed-cell height standard cells of IC202010,643,017Rule checking for multiple patterning technology202010,515,186Method of decomposing a layout for multiple-patterning lithography201910,452,805Method of reconfiguring uncrowned standard cells and semiconductor apparatus including uncrowned and crowned cells201910,275,562Method of decomposing a layout for multiple-patterning lithography201910,275,559Method for legalizing mixed-cell height standard cells of IC201910,169,520Method of reconfiguring uncrowned standard cells and semiconductor apparatus including uncrowned and crowned cells201910,162,929Systems and methods for using multiple libraries with different cell pre-coloring201810,140,407Method, device and computer program product for integrated circuit layout generation201810,089,433Method for triple-patterning friendly placement201810,055,531Layout checking method for advanced double patterning photolithography with multiple spacing criteria20189,971,863Rule checking for multiple patterning technology20189,165,105'Rule checking for confining waveform induced constraint variation in static timing analysis'20159,064,081'Generating database for cells routable in pin layer'20158,972,910'Routing method'20158,689,164'Method of analytical placement with weighted-average wirelength model'20148,261,223'Hierarchy-based analytical placement method capable of macro rotation within an integrated circuit'2012Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2012–2014Patents assigned to CHANG YAO-WEN (2)· patent assignee history
2012–2014Patents assigned to HSU MENG-KAI (2)· patent assignee history
2012Based in New Taipei, TW· patent location history
2014Patents assigned to BALABANOV VALERIY (1)· patent assignee history
2014Based in Taipei, TW· patent location history
2015–2021Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (15)· patent assignee history
2015Patents assigned to TAIWAN SEMICONDUCTOR MFG (2)· patent assignee history
2015–2021Based in Xinfeng Township, TW· patent location history
2015–2020Based in Hsinchu County, TW· patent location history
2018–2020Based in Hsinchu, TW· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| TAIWAN SEMICONDUCTOR MFG CO LTD | 15 | 2015–2021 |
| CHANG YAO-WEN | 2 | 2012–2014 |
| HSU MENG-KAIself | 2 | 2012–2014 |
| TAIWAN SEMICONDUCTOR MFG | 2 | 2015 |
| BALABANOV VALERIY | 1 | 2014 |
Locations
| Location | Patents | Span |
|---|---|---|
| Xinfeng Township, TW | 7 | 2015–2021 |
| Hsinchu County, TW | 7 | 2015–2020 |
| Hsinchu, TW | 3 | 2018–2020 |
| Taipei, TW | 1 | 2014 |
| New Taipei, TW | 1 | 2012 |