Inventor

Ian A. Young

Inventor

Portland, OR, US

Overview

1982–2021

Patent span

Electricity

Primary field (CPC H)

Patents· 163 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H01Lprimary

H01LSemiconductor devices15%

G11CStatic stores14%

H03KPulse technique9%

H10BElectronic memory devices9%

H10DInorganic electric semiconductor devices9%

H10NElectric solid-state devices not otherwise provided for8%

G06FElectric digital data processing7%

H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h103%

H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses3%

G02BOptical elements, systems or apparatus3%

PatentTitleYear

11,127,785Cross-point magnetic random access memory with piezoelectric selector2021 11,114,144Magnetoelectric spin orbit logic with paramagnets2021 11,107,908Transistors with metal source and drain contacts including a Heusler alloy2021 11,069,609Techniques for forming vias and other interconnects for integrated circuit structures2021 11,063,131Ferroelectric or anti-ferroelectric trench capacitor with spacers for sidewall strain engineering2021 11,062,752Spin orbit torque memory devices and methods of fabrication2021 11,061,646Compute in memory circuits with multi-Vdd arrays and/or analog multipliers2021 11,056,593Semiconductor devices with metal contacts including crystalline alloys2021 11,048,434Compute in memory circuits with time-to-digital computation2021 11,038,099Perpendicular magnetoelectric spin orbit logic2021 11,037,614Imprint-free write driver for ferroelectric memory2021 11,016,701Oscillator circuitry to facilitate in-memory computation2021 11,004,868Memory field-effect transistors and methods of manufacturing the same2021 10,998,405Low-defect graphene-based devices and interconnects2021 10,998,495Magnetostrictive stack and corresponding bit-cell2021 10,998,339One transistor and ferroelectric FET based memory cell2021 10,956,813Compute-in-memory circuit having a multi-level read wire with isolated voltage distributions2021 10,957,844Magneto-electric spin orbit (MESO) structures having functional oxide vias2021 10,944,399Multi-level spin logic2021 10,923,188Macro storage cell composed of multiple storage devices each capable of storing more than two states2021 10,910,556Magnetic and spin logic devices based on Jahn-Teller materials2021 10,901,486Configurable interconnect apparatus and method2021 10,886,265Integrated circuit device with a two-dimensional semiconductor material and a dielectric material that includes fixed charges2021 10,884,957Pipeline circuit architecture to provide in-memory computation functionality2021 10,885,963Ferroelectric memory-based synapses2021 10,886,286Vertical memory control circuitry located in interconnect layers2021 10,877,752Techniques for current-sensing circuit design for compute-in-memory2020 10,860,682Binary, ternary and bit serial compute-in-memory circuits2020 10,861,861Memory including a perovskite material2020 10,831,446Digital bit-serial multi-multiply-and-accumulate compute in memory2020 10,832,761Polarization gate stack SRAM2020 10,825,509Full-rail digital read compute-in-memory circuit2020 10,777,250Save-restore circuitry with metal-ferroelectric-metal devices2020 10,749,104Combinatorial magneto electric spin orbit logic2020 10,748,603In-memory multiply and accumulate with global charge-sharing2020 10,748,602Nonvolatile SRAM2020 10,734,378Transistor threshold voltage variation optimization2020 10,720,438Memory array with ferroelectric elements2020 10,720,504Transistor with dynamic threshold voltage for low-leakage standby and high speed active mode2020 10,707,846Tunnel field-effect transistor (TFET) based high-density and low-power sequential2020 10,705,967Programmable interface to in-memory cache processor2020 10,679,782Spin logic with spin hall electrodes and charge interconnects2020 10,651,182Three-dimensional ferroelectric NOR-type memory2020 10,642,922Binary, ternary and bit serial compute-in-memory circuits2020 10,636,840Quaternary spin hall memory2020 10,622,132Spin logic device with high spin injection efficiency from a matched spin transfer layer2020 10,608,167Spin logic with magnetic insulators switched by spin orbit coupling2020 10,600,957Method for fabricating spin logic devices from in-situ deposited magnetic stacks2020 10,573,385Ferroelectric based memory cell with non-volatile retention2020 10,565,138Memory device with multiple memory arrays to facilitate in-memory computation2020 10,559,349Polarization gate stack SRAM2020 10,553,268Methods and apparatus to perform complex number generation and operation on a chip2020 10,553,694Transistors with temperature compensating gate structures2020 10,535,770Scaled TFET transistor formed using nanowire with surface termination2020 10,522,683Transistors with ballistic or quasi-ballistic carrier behavior and low resistance in source and drain nodes2019 10,483,455Magnetic element for memory and logic2019 10,483,026Metallic spin super lattice for logic and memory devices2019 10,457,548Integrating MEMS structures with interconnects and vias2019 10,439,599Non-boolean associative processor degree of match and winner take all circuits2019 10,416,217On-chip test circuit for magnetic random access memory (MRAM)2019 10,355,005Semi-volatile embedded memory with between-fin floating-gate device and method2019 10,347,830Non-volatile register file including memory cells having conductive oxide memory element2019 10,331,582Write congestion aware bypass for non-volatile memory, last level cache (LLC) dropping from write queue responsive to write queue being full and read queue threshold wherein the threshold is derived from latency of write to LLC and main memory retrieval time2019 10,333,523Exclusive-OR logic device with spin orbit torque effect2019 10,320,404Coupled spin hall nano oscillators with tunable strength2019 10,261,923Configurable interconnect apparatus and method2019 10,263,036Strain assisted spin torque switching spin transfer torque memory2019 10,236,345Field effect transistor having a Fermi filter between a source and source contact thereof2019 10,170,185Hybrid memory and MTJ based MRAM bit-cell and array2019 10,128,356P-tunneling field effect transistor device with pocket2018 10,062,731Spin-orbit logic with charge interconnects and magnetoelectric nodes2018 10,043,971Non-volatile register file including memory cells having conductive oxide memory element2018 9,997,227Non-volatile ferroelectric logic with granular power-gating2018 9,985,611Tunnel field-effect transistor (TFET) based high-density and low-power sequential2018 9,947,805Nanowire-based mechanical switching device2018 9,927,211'Cloaking system with waveguides'2018 9,911,835'Tunneling field effect transistors (TFETs) for CMOS architectures and approaches to fabricating N-type and P-type TFETs'2018 9,871,106'Heterogeneous pocket for tunneling field effect transistors (TFETs)'2018 9,847,475Magnetic domain wall logic devices and interconnect2017 9,842,643'Apparatuses, methods, and systems for dense circuitry using tunnel field effect transistors'2017 9,741,832'Tunneling field effect transistors with a variable bandgap channel'2017 9,712,171'Clocked all-spin logic circuit'2017 9,711,215'Apparatus and method to optimize STT-MRAM size and write error rate'2017 9,620,188'MTJ spin hall MRAM bit-cell and array'2017 9,583,602'Tunneling field effect transistors (TFETs) for CMOS architectures and approaches to fabricating N-type and P-type TFETs'2017 9,583,566'Reduced scale resonant tunneling field effect transistor'2017 9,577,060'Piezoresistive resonator with multi-gate transistor'2017 9,570,139'Magnetic state element and circuits'2017 9,559,698'Spintronic logic element'2017 9,526,285'Flexible computing fabric'2016 9,490,780'Apparatuses, methods, and systems for dense circuitry using tunnel field effect transistors'2016 9,460,768'Cross point array MRAM having spin hall MTJ devices'2016 9,437,298'Self-storing and self-restoring non-volatile static random access memory'2016 9,412,872'N-type and P-type tunneling field effect transistors (TFETs)'2016 9,391,262'Nanomagnetic devices switched with a spin hall effect'2016 9,379,712'High speed precessionally switched magnetic logic'2016 9,362,074'Nanowire-based mechanical switching device'2016 9,310,565'Cloaking system with waveguides'2016 9,305,629'Integrated capacitor based power distribution'2016 9,294,035'Multigate resonant channel transistor'2016 9,287,576'Self-powered internal medical device'2016 9,281,467'Spin hall effect memory'2016 9,209,288'Reduced scale resonant tunneling field effect transistor'2015 9,195,787'Methods and apparatus for modeling and simulating spintronic integrated circuits'2015 9,136,848'High speed precessionally switched magnetic logic'2015 9,070,468'Magnetic state element and circuits'2015 8,988,109'High speed precessionally switched magnetic logic'2015 8,933,522'Repeated spin current interconnects'2015 8,933,521'Three-dimensional magnetic circuits including magnetic connectors'2015 8,890,120'Tunneling field effect transistors (TFETs) for CMOS approaches to fabricating N-type and P-type TFETs'2014 8,294,858'Integrated photovoltaic cell for display device'2012 8,274,339'Automatic frequency control architecture with digital temperature compensation'2012 7,999,586'Digital phase locked loop with closed loop linearization technique'2011 7,742,910'Mechanism for estimating and controlling di/dt-induced power supply voltage variations'2010 7,729,393'Surface emitting laser with an integrated absorber'2010 7,619,452'Mutual charge cancelling sample-reset loop filter for phase locked loops'2009 7,593,496'Phase interpolator'2009 7,583,151'VCO amplitude control'2009 7,501,869'Low power, low phase jitter, and duty cycle error insensitive clock receiver architecture and circuits for source synchronous digital data communication'2009 7,501,904'Low power and duty cycle error free matched current phase locked loop'2009 7,418,163'Optoelectrical package'2008 7,327,174'Fast locking mechanism for delay lock loops and phase lock loops'2008 7,236,920'Mechanism for estimating and controlling di/dt-induced power supply voltage variations'2007 7,068,892'Passively aligned optical-electrical interface'2006 7,049,704'Flip-chip package integrating optical and electrical devices and coupling to a waveguide on a board'2006 7,035,785'Mechanism for estimating and controlling di/dt-induced power supply voltage variations'2006 7,026,883'Feedback loop for LC VCO'2006 6,968,104'Variable bending radius H-tree distribution device'2005 6,876,794'Multi-waveguide layer H-tree distribution device'2005 6,856,129'Current probe device having an integrated amplifier'2005 6,760,801'Ground referenced voltage source input/output scheme for multi-drop bus'2004 6,754,407'Flip-chip package integrating optical and electrical devices and coupling to a waveguide on a board'2004 6,670,833'Multiple VCO phase lock loop architecture'2003 6,650,161'Clock distribution network having regulated power supply'2003 6,636,976'Mechanism to control di/dt for a microprocessor'2003 6,556,471'VDD modulated SRAM for highly scaled, high performance cache'2003 6,538,497'On-chip power supply boost for voltage droop reduction'2003 6,512,861'Packaging and assembly method for optical coupling'2003 6,407,600'Method and apparatus for providing a start-up control voltage'2002 6,303,464'Method and structure for reducing interconnect system capacitance through enclosed voids in a dielectric layer'2001 6,229,861'Clock distribution network utilizing local deskewing clock generator circuitry'2001 6,172,937'Multiple synthesizer based timing signal generation scheme'2001 6,125,217'Clock distribution network'2000 6,081,141'Hierarchical clock frequency domains for a semiconductor device'2000 6,075,908'Method and apparatus for optically modulating light through the back side of an integrated circuit die'2000 6,064,223'Low leakage circuit configuration for MOSFET circuits'2000 5,446,867'Microprocessor PLL clock circuit with selectable delayed feedback'1995 5,412,349'PLL clock generator integrated with microprocessor'1995 5,300,829'BiCMOS circuit with negative V.sub.BE protection'1994 5,280,605'Clock speed limiter for microprocessor'1994 5,274,337'Clock speed limiter for a microprocessor by comparing clock signal with a predetermined frequency'1993 5,247,479'Current sensing amplifier for SRAM'1993 5,235,549'Semiconductor device with apparatus for performing electrical tests on single memory cells'1993 5,113,096'BiCMOS circuit'1992 5,111,077'BiCMOS noninverting buffer and logic gates'1992 5,049,765'BiCMOS noninverting buffer and logic gates'1991 4,888,503'Constant current biased common gate differential sense amplifier'1989 4,796,230'Folded-cascode configured differential current steering column decoder circuit'1989 4,710,647'Substrate bias generator including multivibrator having frequency independent of supply voltage'1987 4,658,160'Common gate MOS differential sense amplifier'1987 4,379,267'Low power differential amplifier'1983 4,338,571'Low sensitivity switched-capacitor ladder filter using monolithic MOS chip'1982 4,316,106'Dynamic ratioless circuitry for random logic applications'1982

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1982–1983Based in Farmers Branch, TX, US· patent location history

1987–2021Patents assigned to INTEL CORP (158)· patent assignee history

1987–2021Based in Portland, OR, US· patent location history

2012–2020Patents assigned to YOUNG IAN A (14)· patent assignee history

2014–2017Patents assigned to CHAUDHRY ANURAG (3)· patent assignee history

2015–2020Patents assigned to MANIPATRUNI SASIKANTH (9)· patent assignee history

2015–2017Patents assigned to NIKONOV DMITRI E (8)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
INTEL CORP	158	1987–2021
YOUNG IAN Aself	14	2012–2020
MANIPATRUNI SASIKANTH	9	2015–2020
NIKONOV DMITRI E	8	2015–2017
CHAUDHRY ANURAG	3	2014–2017

Locations

Location	Patents	Span
Portland, OR, US	160	1987–2021
Farmers Branch, Texas, US	3	1982–1983