Inventor
David B. Rolfe
Inventor
West Hurley, NY, US
Overview
Patents· 19 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
G06Fprimary
G06FElectric digital data processing54%
F02BInternal-combustion piston engines23%
G11CStatic stores9%
Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use9%
H04LTransmission of digital information, e.g. telegraphic communication6%
PatentTitleYear
6,108,340'Incidence graph based communications and operations method and apparatus for parallel processing architecture'20005,963,745'APAP I/O programmable router'19995,963,746'Fully distributed processing memory element'19995,912,893'Incidence graph based communications and operations method and apparatus for parallel processing architecture'19995,903,770'Incidence graph based communications and operations method and apparatus for parallel processing architecture'19995,881,304'Incidence graph based communications and operations method and apparatus for parallel processing architecture'19995,842,031'Advanced parallel array processor (APAP)'19985,794,059'N-dimensional modified hypercube'19985,717,943'Advanced parallel array processor (APAP)'19985,710,935'Advanced parallel array processor (APAP)'19985,617,577'Advanced parallel array processor I/O connection'19975,594,918'Parallel computer system providing multi-ported intelligent memory'19975,590,345'Advanced parallel array processor(APAP)'19965,588,152'Advanced parallel processor including advanced support hardware'19965,555,528'Dynamic random access memory persistent page implemented as processor register sets'19965,519,664'Dynamic random access memory persistent page implemented as processor register sets'19965,508,968'Dynamic random access memory persistent page implemented as processor register sets'19965,485,626'Architectural enhancements for parallel computer systems utilizing encapsulation of queuing allowing small grain processing'19965,313,645'Method for interconnecting and system of interconnected processing elements by controlling network density'1994Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1994–2000Patents assigned to IBM (19)· patent assignee history
1994–2000Based in West Hurley, NY, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 19 | 1994–2000 |
Locations
| Location | Patents | Span |
|---|---|---|
| West Hurley, New York, US | 19 | 1994–2000 |