Inventor

Chen-Hua Yu

Inventor
Hsinchu, TW

Overview

1,244→
Patents
1991–2020
Patent span
Electricity
Primary field (CPC H)

Patents· 1,244 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1035%
H01LSemiconductor devices25%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1019%
H10DInorganic electric semiconductor devices6%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests2%
H10HInorganic light-emitting semiconductor devices having potential barriers2%
H05KPrinted circuits1%
H01QAntennas, i.e. radio aerials1%
Y10TTechnical subjects covered by former us classification1%
C23CCoating metallic material1%
PatentTitleYear
10,879,220Package-on-package structure and manufacturing method thereof202010,879,153Chip package structure202010,879,183Semiconductor device and method of manufacture202010,878,073Fingerprint sensor pixel array and methods of forming same202010,872,878Packaging methods for semiconductor devices, packaged semiconductor devices, and design methods thereof202010,872,842Semiconductor device and manufacturing method thereof202010,872,874Bonding apparatus and method of bonding substrates202010,872,836Package structure for heat dissipation202010,872,865Electric magnetic shielding structure in packages202010,867,911InFO coil structure and methods of manufacturing same202010,867,941Semiconductor device and method202010,867,929Semiconductor structures and methods of forming the same202010,867,900Dummy metal with zigzagged edges202010,867,936Semiconductor device with shield for electromagnetic interference202010,867,939Package structure and method of fabricating the same202010,867,985Method and structure of three-dimensional chip stacking202010,867,965Package structures and methods of forming the same202010,867,949Substrate design for semiconductor packages and method of forming same202010,867,885Heat spreading device and method202010,867,938Package structure202010,867,884Heat spreading device and method202010,867,879Integrated circuit package and method202010,866,373Optical transceiver and manufacturing method thereof202010,867,811Semiconductor device202010,867,874Semiconductor device and method202010,867,960Device package including molding compound having non-planar top surface around a die and method of forming same202010,867,947Semiconductor packages and methods of manufacturing the same202010,867,832Apparatus for holding semiconductor wafers202010,867,878Dam for three-dimensional integrated circuit202010,867,958Integrated circuit with a thermally conductive underfill202010,869,385Semiconductor device, circuit board structure and method of fabricating the same202010,867,982Hybrid integrated circuit package and method202010,861,835Solution for reducing poor contact in InFO package202010,861,809Semiconductor structure and method of forming202010,861,773Semiconductor package and manufacturing method thereof202010,859,922Lithography system and method202010,861,814Integrated fan-out packages and methods of forming the same202010,854,580Semiconductor structure along with multiple chips bonded through microbump and manufacturing method thereof202010,853,616Fingerprint sensor device and method202010,854,552Semiconductor device and method of manufacture202010,854,568Packages with Si-substrate-free interposer and method forming same202010,854,5773D die stacking structure with fine pitches202010,847,505Multi-chip semiconductor package202010,847,304InFO coil on metal plate with slot202010,847,459Semiconductor die contact structure and method202010,847,414Embedded 3D interposer structure202010,847,493Bump-on-trace interconnect202010,840,217Stacked chip package and methods of manufacture thereof202010,840,227Under-bump-metallization structure and redistribution layer design for integrated fan-out package with integrated passive device202010,840,218Semiconductor device and method of manufacture202010,833,039Multi-chip fan out package and methods of forming the same202010,833,030Semiconductor device and method of manufacture202010,832,985Sensor package and method202010,825,693Carrier warpage control for three dimensional integrated circuit (3DIC) stacking202010,825,798Packages with stacked dies and methods of forming the same202010,825,773Package structure with reinforcement structures in a redistribution circuit structure and method of manufacturing the same202010,825,696Cross-wafer RDLs in constructed wafers202010,825,602Stacked coil for wireless charging structure on InFO package202010,818,607Semiconductor device and method of manufacture202010,818,640Die stacks and methods forming same202010,811,389Semiconductor package for thermal dissipation202010,811,394Devices employing thermal and mechanical enhanced layers and methods of forming same202010,811,404Package structure and method of manufacturing the same202010,804,178Integrated circuit package and method of forming same202010,804,242Methods of forming multi-die package structures including redistribution layers202010,804,247Chip package structure with conductive shielding film202010,797,031Semiconductor package202010,796,927Integrated circuit package pad and methods of forming202010,797,038Semiconductor package and rework process for the same202010,796,990Semiconductor structure, package structure, and manufacturing method thereof202010,790,261Bonding through multi-shot laser reflow202010,790,269Semiconductor devices and semiconductor structures202010,790,244Semiconductor device and method202010,784,162Method of making a semiconductor component having through-silicon vias202010,784,207Multi-stacked package-on-package structures202010,784,248Multi-stack package-on-package structures202010,777,502Semiconductor chip, package structure, and pacakge-on-package structure202010,777,430Photonic integrated package and method forming same202010,777,518Package structure and method of manufacturing the same202010,770,365Package structures and methods of forming the same202010,770,428Semiconductor device and method202010,772,205Circuit board, semiconductor device including the same, and manufacturing method thereof202010,770,655CHIP package202010,770,795Antenna device and method for manufacturing antenna device202010,763,164Package structure with inductor and method of forming thereof202010,763,229Semiconductor structure202010,756,010Semiconductor device packaging structure having through interposer vias and through substrate vias202010,748,841Packages with Si-substrate-free interposer and method forming same202010,748,870Tri-layer COWOS structure202010,746,923Photonic semiconductor device and method202010,734,295Interposer test structures and methods202010,734,323Package structures202010,734,279Semiconductor package device with integrated antenna and manufacturing method thereof202010,734,345Packaging through pre-formed metal pins202010,734,348Bonded semiconductor devices and methods of forming the same202010,727,201Packages formed using RDL-last process202010,727,217Method of manufacturing semiconductor device that uses bonding layer to join semiconductor substrates together202010,720,388Wireless charging package with chip integrated in coil center202010,720,788Wireless charging devices having wireless charging coils and methods of manufacture thereof202010,720,409Semiconductor packages with thermal-electrical-mechanical chips and methods of forming the same202010,714,414Planarizing RDLS in RDL--First Processes Through CMP Process202010,714,359Substrate design for semiconductor packages and method of forming same202010,714,426Semiconductor package and method of forming the same202010,714,457Semiconductor packages and methods of forming same202010,707,173Package structure and manufacturing method thereof202010,707,094Semiconductor package and manufacturing process thereof202010,700,045Surface mount device/integrated passive device on package or device structure and methods of forming202010,698,994Fingerprint sensor pixel array and methods of forming same202010,700,025Fan-out interconnect structure and method for forming same202010,692,817Semiconductor device with shielding structure for cross-talk reduction202010,685,937Integrated circuit package having dummy structures and method of forming same202010,685,910Packages with Si-substrate-free interposer and method forming same202010,685,911Semiconductor package and manufacturing method of the same202010,679,968Package with thinned substrate202010,679,951Chip-on-substrate packaging on carrier202010,679,947Chip package and manufacturing method thereof202010,672,647Wafer level chip scale packaging intermediate structure apparatus and method202010,672,674Method of forming semiconductor device package having testing pads on a topmost die202010,672,741Semiconductor packages with thermal-electrical-mechanical chips and methods of forming the same202010,672,738Package structures and methods of forming202010,663,512Testing of semiconductor chips with microbumps202010,665,468Multi-chip structure and method of forming same202010,665,540Redistribution layer structures for integrated circuit package202010,665,560Optical semiconductor package and method for manufacturing the same202010,665,582Method of manufacturing semiconductor package structure202010,658,337Packages and packaging methods for semiconductor devices, and packaged semiconductor devices202010,658,348Semiconductor devices having a plurality of first and second conductive strips202010,658,347Semiconductor packages and methods of forming the same202010,658,199Semiconductor device and method202010,651,149Packages formed using RDL--last process202010,651,675Packaged semiconductor devices with wireless charging means202010,651,137Manufacturing method of a package structure202010,643,965Structure and method of forming a joint assembly202010,643,864Fan-out structure and method of fabricating the same202010,636,715Semiconductor package and method of fabricating the same202010,638,616Circuit carrier and manifacturing method thereof202010,636,748Package structure202010,629,477Raised via for terminal connections on different planes202010,629,540Semiconductor device and method202010,629,508Packaged semiconductor devices and methods of packaging semiconductor devices202010,629,537Conductive vias in semiconductor packages and methods of forming same202010,629,541Semiconductor structure and manufacturing method thereof202010,622,327Method for manufacturing semiconductor structure202010,622,297Semiconductor device and method202010,622,701Antenna apparatus and method202010,622,302Via for semiconductor device connection and methods of forming the same202010,622,321Semiconductor structures and methods of forming the same202010,566,237Profile of through via protrusion in 3DIC interconnect202010,559,546Package on package structure and method for forming the same202010,553,569Multi-die structure and method for forming same202010,555,424Circuit board, semiconductor device including the same, and manufacturing method thereof202010,541,227System on integrated chips and methods of forming same202010,541,228Packages formed using RDL-last process202010,541,226Package structure and method of forming the same202010,535,6313D Chip-on-wager-on-substrate structure with via last process202010,535,639Semiconductor device and manufacturing method of the same202010,535,913Package structure, electronic device and method of fabricating package structure202010,535,629Method of manufacturing semiconductor structure202010,530,175Hexagonal semiconductor package structure202010,529,666Semiconductor structure and manufacturing method thereof202010,529,690Package structures and methods of forming the same202010,529,698Semiconductor packages and methods of forming same202010,529,637Integrated circuit package and method of forming same202010,529,675Info structure and method forming same202010,522,449Packages with Si-substrate-free interposer and method forming same201910,522,481Post-passivation interconnect structure201910,522,473Alignment mark design for packages201910,522,501Semiconductor structure and method of forming the same201910,522,491Semiconductor device and bump formation process201910,515,901InFO-POP structures with TIVs having cavities201910,515,829Package system for integrated circuits201910,515,940Method and structure of three-dimensional chip stacking201910,515,933System, structure, and method of manufacturing a semiconductor substrate stack201910,513,070Wafer level transfer molding and apparatus for performing the same201910,515,851Method for forming semiconductor device structure with conductive shielding structure201910,515,865Underfill control structures and method201910,515,921Semiconductor package and method of fabricating semiconductor package201910,510,681Semiconductor device201910,509,938Fingerprint sensor device and method201910,510,630Molding structure for wafer level package201910,510,654Dummy metal with zigzagged edges201910,510,710Bump-on-trace interconnect201910,510,660Semiconductor package devices integrated with inductor201910,510,697Semiconductor package system and method201910,510,604Semiconductor device and method201910,510,674Fan-out package having a main die and a dummy die, and method of forming201910,510,634Package structure and method201910,510,699Bond structures and the methods of forming the same201910,510,731Package-on-package (PoP) structure including stud bulbs201910,510,679Semiconductor device with shield for electromagnetic interference201910,510,556Integrated circuit package pad and methods of forming201910,510,645Planarizing RDLs in RDL-first processes through CMP process201910,510,735Packages and methods of forming packages201910,510,701Semiconductor die connection system and method201910,510,478Stacked coil for wireless charging structure on InFO package201910,510,682Semiconductor device with shield for electromagnetic interference201910,510,698Semiconductor structure and method of forming201910,510,629Integrated circuit package and method of forming same201910,510,716Packaged semiconductor devices and methods of packaging semiconductor devices201910,510,695Package structure and method of forming the same201910,510,650Method of manufacturing semiconductor device packaging structure having through interposer vias and through substrate vias201910,510,719Methods of packaging semiconductor devices and packaged semiconductor devices201910,510,717Chip on package structure and method201910,510,715Semiconductor structure and manufacturing method thereof201910,510,670Pad structure design in fan-out package201910,504,877Surface mount device/integrated passive device on package or device structure and methods of forming201910,504,810Polymer-based-semiconductor structure with cavity201910,504,835Package structure, semiconductor chip and method of fabricating the same201910,497,616Embedded 3D interposer structure201910,498,0093D antenna for integrated circuits201910,497,668Integrated fan-out package including voltage regulators and methods forming same201910,497,619Method of manufacturing a semiconductor device including through silicon plugs201910,490,540Multi-stack package-on-package structures201910,483,187Heat spreading device and method201910,483,617Package structure201910,481,351Semicondcutor packages201910,475,747Integrated fan-out package and method for fabricating the same201910,475,768Redistribution layers in semiconductor packages and methods of forming same201910,475,759Integrated circuit structure having dies with connectors of different sizes201910,475,755Semiconductor structure201910,475,764Die bonder and methods of using the same201910,468,377Device package including molding compound having non-planar top surface around a die201910,468,355EMI Shielding structure in InFO package201910,468,385Semiconductor structure including plurality of chips along with air gap and manufacturing method thereof201910,461,036Multi-stacked package-on-package structures201910,461,034Package structure and manufacturing method thereof201910,460,987Semiconductor package device with integrated antenna and manufacturing method thereof201910,461,022Semiconductor package structure and manufacturing method thereof201910,453,815Methods and apparatus for solder connections201910,431,738Integrated fan-out package and method for fabricating the same201910,381,298Packages with Si-substrate-free interposer and method forming same201910,381,309Package structure having connecting module201910,371,893Hybrid interconnect device and method201910,373,8853D stacked-chip package201910,366,953Redistribution layer structures for integrated circuit package201910,368,442Integrated circuit structure and method of forming201910,361,161Semiconductor device and method of manufacture201910,361,122Processes for reducing leakage and improving adhesion201910,354,964Integrated devices in semiconductor packages and methods of forming same201910,354,114Fingerprint sensor in InFO structure and formation method201910,354,961Routing design of dummy metal cap and redistribution line201910,354,983Integrated circuit package and methods of forming same201910,347,606Devices employing thermal and mechanical enhanced layers and methods of forming same201910,347,607Semiconductor devices and methods of manufacture thereof201910,347,612Solution for reducing poor contact in InFO package201910,340,206Dense redistribution layers in semiconductor packages and methods of forming the same201910,340,236Semiconductor device and method of manufacture201910,340,249Semiconductor device and method201910,340,226Interconnect crack arrestor structure and methods201910,333,623Optical transceiver201910,332,838Schemes for forming barrier layers for copper in interconnect structures201910,332,841System on integrated chips and methods of forming the same201910,325,853Method of forming semiconductor packages having through package vias201910,325,879Fan-out stacked system in package (SIP) and the methods of making the same201910,319,690Semiconductor structure and manufacturing method thereof201910,319,701Bonded 3D integrated circuit (3DIC) structure201910,319,655POP structures with dams encircling air gaps and methods for forming the same201910,319,683Multi-stacked package-on-package structures201910,319,681Dummy features in redistribution layers (RDLS) and methods of forming same201910,319,699Chip package having die structures of different heights201910,312,203Structure and formation method of chip package with antenna element201910,312,327FinFETs having dielectric punch-through stoppers201910,312,204System and method for an improved interconnect structure201910,304,801Redistribution layers in semiconductor packages and methods of forming same201910,304,614Stacked coil for wireless charging structure on InFO package201910,304,700Semiconductor device and method201910,297,471Fan-out structure and method of fabricating the same201910,297,494Raised via for terminal connections on different planes201910,297,560Semiconductor device and method201910,297,5503D IC architecture with interposer and interconnect structure for bonding dies201910,297,579Package on-package structure with epoxy flux residue201910,297,925Semiconductor device including integrated fan out antenna and method of forming the same201910,290,584Conductive vias in semiconductor packages and methods of forming same201910,290,611Semiconductor packages and methods of forming same201910,290,609Semiconductor device and manufacturing method of the same201910,290,571Packages with si-substrate-free interposer and method forming same201910,290,513Carrier warpage control for three dimensional integrated circuit (3DIC) stacking201910,283,473Package structure and manufacturing method thereof201910,283,470Semiconductor package and manufacturing method thereof201910,283,427Molding structure for wafer level package201910,283,461Info structure and method forming same201910,283,375Integrated circuit package pad and methods of forming201910,276,4013D shielding case and methods for forming the same201910,276,402Semiconductor package and manufacturing process thereof201910,276,920Package structure, electronic device and method of fabricating package structure201910,269,732Info package with integrated antennas or inductors201910,269,737Method for manufacturing semiconductor structure201910,269,904Semiconductor structure and manufacturing method thereof201910,269,773Semiconductor packages and methods of forming the same201910,269,741Bond structures and the methods of forming the same201910,269,619Wafer level chip scale packaging intermediate structure apparatus and method201910,269,757Integrated circuit with a thermally conductive underfill and methods of forming same201910,269,616Method of fabricating semiconductor device isolation structure201910,269,723Alignment mark design for packages201910,269,673Packaged semiconductor devices and methods of packaging semiconductor devices201910,268,868Fingerprint sensor device and method201910,269,481Stacked coil for wireless charging structure on InFO package201910,269,728Semiconductor device with shielding structure for cross-talk reduction201910,269,489Programmable inductor201910,269,762Rework process and tool design for semiconductor package2019

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1991–1999Based in Allentown, PA, US· patent location history
1996–2016Patents assigned to TAIWAN SEMICONDUCTOR MFG (566)· patent assignee history
1996–2011Based in Keelung, TW· patent location history
1997–2020Based in Hsinchu, TW· patent location history
1997–2002Based in Hsin Chu, TW· patent location history
2011–2018Patents assigned to YU CHEN-HUA (223)· patent assignee history
2011–2016Patents assigned to CHIOU WEN-CHIH (58)· patent assignee history
2012–2018Patents assigned to JENG SHIN-PUU (42)· patent assignee history
2015–2020Patents assigned to TAIWAN SEMICONDUCTOR MFG CO LTD (634)· patent assignee history
2017–2019Based in Hinchu, TW· patent location history

Inventor activity

Assignee and location history derived from the patent record.

Assignees
AssigneePatentsSpan
TAIWAN SEMICONDUCTOR MFG CO LTD6342015–2020
TAIWAN SEMICONDUCTOR MFG5661996–2016
YU CHEN-HUAself2232011–2018
CHIOU WEN-CHIH582011–2016
JENG SHIN-PUU422012–2018
Locations
LocationPatentsSpan
Hsinchu, TW11931997–2020
Keelung, TW201996–2011
Allentown, Pennsylvania, US191991–1999
Hsin Chu, TW31997–2002
Hinchu, TW22017–2019