Inventor
Benjamin V. Fasano
Inventor
New Windsor, NY, US
Overview
Patents· 77 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Wprimary
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h1022%
H05KPrinted circuits16%
Y10TTechnical subjects covered by former us classification12%
C04BLime, magnesia7%
H01RElectrically-conductive connections5%
H01LSemiconductor devices4%
Y10STechnical subjects covered by former uspc cross-reference art collections [xracs] and digests4%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h103%
B32BLayered products, i.e. products built-up of strata of flat or non-flat, e.g. cellular or honeycomb, form2%
G02BOptical elements, systems or apparatus2%
PatentTitleYear
11,075,453Microelectronics package with ultra-low-K dielectric region between stacked antenna elements202110,598,860Photonic die fan out package with edge fiber coupling interface and related methods202010,460,956Interposer with lattice construction and embedded conductive metal structures201910,409,014PIC die packaging using magnetics to position optical element201910,128,590Pluggable LGA socket for high density interconnects201810,002,835Structure for establishing interconnects in packages using thin interposers20189,947,204Validation of mechanical connections20189,673,064'Interposer with lattice construction and embedded conductive metal structures'20179,673,177'Selectively soluble standoffs for chip joining'20179,607,973'Method for establishing interconnects in packages using thin interposers'20179,577,361'Pluggable LGA socket for high density interconnects'20179,443,799'Interposer with lattice construction and embedded conductive metal structures'20169,360,644'Laser die and photonics die package'20169,293,439'Electronic module assembly with patterned adhesive array'20169,278,401'Fill head interface with combination vacuum pressure chamber'20169,093,563'Electronic module assembly with patterned adhesive array'20158,981,961'Validation of mechanical connections'20158,940,550'Maintaining laminate flatness using magnetic retention during chip joining'20158,559,474'Silicon carrier optoelectronic packaging'20138,290,008'Silicon carrier optoelectronic packaging'20128,123,089'Dispensing assembly with an injector controlled gas environment'20128,123,088'Dispensing assembly with a controlled gas environment'20127,806,341'Structure for implementing secure multichip modules for encryption applications'20107,781,232'Method to recover underfilled modules by selective removal of discrete components'20107,615,850'Method and device including reworkable alpha particle barrier and corrosion barrier'20097,611,923'Method and apparatus for forming stacked die and substrate structures for increased packing density'20097,518,235'Method and structure to provide balanced mechanical loading of devices in compressively loaded environments'20097,472,836'Method and structure for implementing secure multichip modules for encryption applications'20097,381,590'Method and device including reworkable alpha particle barrier and corrosion barrier'20087,281,667'Method and structure for implementing secure multichip modules for encryption applications'20077,250,675'Method and apparatus for forming stacked die and substrate structures for increased packing density'20077,250,576'Chip package having chip extension and method'20077,088,000'Method and structure to wire electronic devices'20067,087,513'Method to produce low strength temporary solder joints'20066,964,885'Stress resistant land grid array (LGA) module and method of forming the same'20056,835,260'Method to produce pedestal features in constrained sintered substrates'20046,703,560'Stress resistant land grid array (LGA) module and method of forming the same'20046,552,529'Method and apparatus for interim assembly electrical testing of circuit boards'20036,521,355'Optical color tracer indentifier in metal paste that bleed to greensheet'20036,436,332'Low loss glass ceramic composition with modifiable dielectric constant'20026,407,927'Method and structure to increase reliability of input/output connections in electrical devices'20026,391,669'Embedded structures to provide electrical testing for via to via and interface layer alignment as well as for conductive interface electrical integrity in multilayer devices'20026,354,844'Land grid array alignment and engagement design'20026,312,791'Multilayer ceramic substrate with anchored pad'20016,306,528'Method for the controlling of certain second phases in aluminum nitride'20016,258,191'Method and materials for increasing the strength of crystalline ceramic'20016,224,392'Compliant high-density land grid array (LGA) connector and method of manufacture'20016,200,373'Method for controlling of certain second phases in aluminum nitride'20016,194,085'Optical color tracer identifier in metal paste that bleed to greensheet'20016,187,418'Multilayer ceramic substrate with anchored pad'20016,171,988'Low loss glass ceramic composition with modifiable dielectric constant'20016,139,666'Method for producing ceramic surfaces with easily removable contact sheets'20006,136,419'Ceramic substrate having a sealed layer'20006,117,367'Pastes for improved substrate dimensional control'20006,086,383'Coaxial interconnect devices and methods of making the same'20006,051,173'Method of making a solid oxide fuel cell with controlled porosity'20006,051,330'Solid oxide fuel cell having vias and a composite interconnect'20006,051,329'Solid oxide fuel cell having a catalytic anode'20006,004,624'Method for the controlling of certain second phases in aluminum nitride'19995,949,030'Vias and method for making the same in organic board and chip carriers'19995,940,966'Method of making an electronic interconnect device'19995,932,043'Method for flat firing aluminum nitride/tungsten electronic modules'19995,911,945'Method for in-situ environment sensitive sealing and/or product controlling'19995,872,695'Integrated electronic components having conductive filled through holes'19995,846,361'Lamination process for producing non-planar substrates'19985,791,911'Coaxial interconnect devices and methods of making the same'19985,773,377'Low temperature sintered, resistive aluminum nitride ceramics'19985,763,093'Aluminum nitride body having graded metallurgy'19985,755,570'Apparatus for in situ environment sensitive sealing and/or product controlling'19985,753,162'Method for in-situ environment sensitive sealing and/or product controlling'19985,682,589'Aluminum nitride body having graded metallurgy'19975,645,673'Lamination process for producing non-planar substrates'19975,628,849'Method for in-situ environment sensitive sealing and/or product controlling'19975,552,107'Aluminum nitride body having graded metallurgy'19965,552,232'Aluminum nitride body having graded metallurgy'19965,541,145'Low temperature sintering route for aluminum nitride ceramics'19965,340,617'Electrostatic patterning of multi-layer module lamina'1994Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
1994–2019Patents assigned to IBM (70)· patent assignee history
1994–2021Based in New Windsor, NY, US· patent location history
1996–1998Patents assigned to CARBORUNDUM CO (4)· patent assignee history
2012–2013Patents assigned to BUDD RUSSELL A (4)· patent assignee history
2012–2013Patents assigned to ANDRY PAUL S (2)· patent assignee history
2012–2013Based in Yorktown Heights, NY, US· patent location history
2016–2020Patents assigned to GLOBALFOUNDRIES INC (5)· patent assignee history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| IBM | 70 | 1994–2019 |
| GLOBALFOUNDRIES INC | 5 | 2016–2020 |
| BUDD RUSSELL A | 4 | 2012–2013 |
| CARBORUNDUM CO | 4 | 1996–1998 |
| ANDRY PAUL S | 2 | 2012–2013 |
Locations
| Location | Patents | Span |
|---|---|---|
| New Windsor, New York, US | 75 | 1994–2021 |
| Yorktown Heights, New York, US | 2 | 2012–2013 |