Inventor

Anthony R. Bonaccio

Inventor

Shelburne, VT, US

Overview

80→

Patents

1987–2017

Patent span

Electricity

Primary field (CPC H)

Patents· 80 as inventor

Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.

G06Fprimary

G06FElectric digital data processing16%

H03KPulse technique16%

G01RMeasuring electric variables9%

H03LAutomatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses8%

H04LTransmission of digital information, e.g. telegraphic communication8%

H03FAmplifiers7%

G05FSystems for regulating electric or magnetic variables6%

G11CStatic stores5%

H03MCoding5%

Y02DClimate change mitigation technologies in information and communication technologies [ict], i.e. information and communication technologies aiming at the reduction of their own energy use5%

PatentTitleYear

9,698,968'Phase interpolator calibration'2017 9,384,792'Offset-cancelling self-reference STT-MRAM sense amplifier'2016 9,306,729'Phase interpolator calibration'2016 9,252,717'Phase noise reduction in LC-VCO'2016 8,928,418'Compensating for process variation in integrated circuit fabrication'2015 8,793,365'Environmental and computing cost reduction with improved reliability in workload assignment to distributed computing nodes'2014 8,791,726'Controlled resonant power transfer'2014 8,587,464'Off-line gain calibration in a time-interleaved analog-to-digital converter'2013 8,493,250'Comparator offset cancellation in a successive approximation analog-to-digital converter'2013 8,302,037'Skewed double differential pair circuit for offset cancellation'2012 8,016,482'Method and systems of powering on integrated circuit'2011 7,966,537'Digital reliability monitor having autonomic repair and notification capability'2011 7,945,805'Architecture for a physical interface of a high speed front side bus'2011 7,932,552'Multiple source-single drain field effect semiconductor device and circuit'2011 7,932,774'Structure for intrinsic RC power distribution for noise filtering of analog supplies'2011 7,916,531'Memory elements and methods of using the same'2011 7,863,960'Three-dimensional chip-stack synchronization'2011 7,823,002'Digital reliability monitor having autonomic repair and notification capability'2010 7,814,449'Design structure for multiple source-single drain field effect semiconductor device and circuit'2010 7,795,940'Micro-phase adjusting and micro-phase adjusting mixer circuits designed with standard field effect transistor structures'2010 7,793,237'System, structure and method of providing dynamic optimization of integrated circuits using a non-contact method of selection, and a design structure'2010 7,770,139'Design structure for a flexible multimode logic element for use in a configurable mixed-logic signal distribution path'2010 7,755,420'Intrinsic RC power distribution for noise filtering of analog supplies'2010 7,733,984'Implementing phase rotator circuits with embedded polyphase filter network stage'2010 7,716,007'Design structures of powering on integrated circuit'2010 7,656,971'Adjustable phase controlled clock and data recovery circuit'2010 7,624,297'Architecture for a physical interface of a high speed front side bus'2009 7,573,937'Phase rotator control test scheme'2009 7,550,789'Using electrically programmable fuses to hide architecture, prevent reverse engineering, and make a device inoperable'2009 7,545,298'Design structure for a digital-to-analog converter using dual-gate transistors'2009 7,545,297'Digital-to-analog converter using dual-gate transistors'2009 7,501,880'Body-biased enhanced precision current mirror'2009 7,483,806'Design structures, method and systems of powering on integrated circuit'2009 7,477,541'Memory elements and methods of using the same'2009 7,454,305'Method and apparatus for storing circuit calibration information'2008 7,449,942'Intrinsic RC power distribution for noise filtering of analog supplies'2008 7,442,583'Using electrically programmable fuses to hide architecture, prevent reverse engineering, and make a device inoperable'2008 7,429,877'Design structure for a flexible multimode logic element for use in a configurable mixed-logic signal distribution path'2008 7,403,039'Flexible multimode logic element for use in a configurable mixed-logic signal distribution path'2008 7,362,138'Flexible multimode logic element for use in a configurable mixed-logic signal distribution path'2008 7,358,823'Programmable capacitors and methods of using the same'2008 7,287,177'Digital reliability monitor having autonomic repair and notification capability'2007 7,272,196'Adjustable phase controlled clock and data recovery circuit'2007 7,268,632'Structure and method for providing gate leakage isolation locally within analog circuits'2007 7,219,113'Pseudo-random binary sequence checker with automatic synchronization'2007 7,167,053'Integrated circuit amplifier device and method using FET tunneling gate current'2007 7,135,907'Clock signal distribution utilizing differential sinusoidal signal pair'2006 7,071,757'Clock signal distribution utilizing differential sinusoidal signal pair'2006 7,053,712'Method and apparatus for controlling common-mode output voltage in fully differential amplifiers'2006 6,963,240'Damping of LC ringing in IC (integrated circuit) power distribution systems'2005 6,956,417'Leakage compensation circuit'2005 6,941,435'Integrated circuit having register configuration sets'2005 6,879,638'Method and apparatus for providing communication between electronic devices'2005 6,452,448'Family of analog amplifier and comparator circuits with body voltage control'2002 6,369,671'Voltage controlled transmission line with real-time adaptive control'2002 6,345,380'Interconnected integrated circuits having reduced inductance during switching and a method of interconnecting such circuits'2002 6,337,573'Contact test circuit'2002 6,294,942'Method and apparatus for providing self-terminating signal lines'2001 6,294,921'Apparatus for testing an integrated circuit device'2001 6,282,038'Variable gain amplifier with temperature compensation for use in a disk drive system'2001 6,255,899'Method and apparatus for increasing interchip communications rates'2001 6,177,809'Redundant input/output driver circuit'2001 6,177,818'Complementary depletion switch body stack off-chip driver'2001 6,087,841'Contact test circuit'2000 6,034,568'Broadband dc amplifier technique with very low offset voltage'2000 6,011,423'Virtual voltage power supply'2000 5,901,002'Quad burst servo demodulator with adjustable slew rate for hard disk drives'1999 5,894,239'Single shot with pulse width controlled by reference oscillator'1999 5,874,840'Differential source follower with body effect compensation'1999 5,859,461'Method and apparatus for interfacing integrated circuits having different supply voltages'1999 5,841,309'Low voltage input buffer for asymmetrical logic signals'1998 5,706,222'Multiple mode peak detector'1998 5,548,452'Quad burst servo demodulator with adjustable slew rate for hard disk drives'1996 5,532,619'Precision level shifter w/current mirror'1996 5,488,306'Open and short fault detector for a differential interface'1996 5,424,662'Differential current mode driver circuit with low common-mode noise'1995 5,410,186'Programmable digital to analog converter'1995 5,043,674'Differential receiver with high common-mode range'1991 4,782,300'Differential transceiver with line integrity detection'1988 4,697,099'Open line detector circuit'1987

Career & activity timeline

Assembled from patent assignee/location history and declaration credentials.

1987–2017Patents assigned to IBM (78)· patent assignee history

1987–2017Based in Shelburne, VT, US· patent location history

1988Based in Colchester, VT, US· patent location history

2006Based in Burlington, VT, US· patent location history

2011–2012Based in Essex Junction, VT, US· patent location history

2011Based in Essex, VT, US· patent location history

2012–2013Patents assigned to BONACCIO ANTHONY R (3)· patent assignee history

2012–2014Patents assigned to ARSOVSKI IGOR (2)· patent assignee history

2013Patents assigned to KEYSER III FRANK R (2)· patent assignee history

2016Patents assigned to GLOBALFOUNDRIES INC (2)· patent assignee history

Inventor activity

Assignee and location history derived from the patent record.

Assignees

Assignee	Patents	Span
IBM	78	1987–2017
BONACCIO ANTHONY Rself	3	2012–2013
ARSOVSKI IGOR	2	2012–2014
GLOBALFOUNDRIES INC	2	2016
KEYSER III FRANK R	2	2013

Locations

Location	Patents	Span
Shelburne, VT, US	75	1987–2017
Essex Junction, VT, US	2	2011–2012
Essex, VT, US	1	2011
Burlington, VT, US	1	2006
Colchester, VT, US	1	1988