Inventor
Alexander Viktorovich Bolotnikov
Inventor
Niskayuna, NY, US
Overview
Patents· 41 as inventor
Public. Assignee & technology derived from the patent record. Each patent links to its LexDana page.
H10Dprimary
H10DInorganic electric semiconductor devices36%
H01LSemiconductor devices35%
H10PGeneric processes or apparatus for the manufacture or treatment of devices covered by class h1017%
H10WGeneric packages, interconnections, connectors or other constructional details of devices covered by class h107%
H03KPulse technique2%
G01RMeasuring electric variables1%
G06FElectric digital data processing1%
H02HEmergency protective circuit arrangements1%
H10FInorganic semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation1%
PatentTitleYear
11,069,772Techniques for fabricating planar charge balanced (CB) metal-oxide-semiconductor field-effect transistor (MOSFET) devices202111,063,115Semiconductor device and method of making thereof202111,056,586Techniques for fabricating charge balanced (CB) trench-metal-oxide-semiconductor field-effect transistor (MOSFET) devices202111,031,472Systems and methods for integrated diode field-effect transistor semiconductor devices202110,957,759Systems and methods for termination in silicon carbide charge balance power devices202110,937,870Electric field shielding in silicon carbide metal-oxide-semiconductor (MOS) device cells using body region extensions202110,636,660Super-junction semiconductor device fabrication202010,608,079High energy ion implantation for junction isolation in silicon carbide devices202010,600,871Electric field shielding in silicon carbide metal-oxide-semiconductor (MOS) device cells using body region extensions202010,600,649Systems and method for charge balanced semiconductor power devices with fast switching capability202010,586,846System and method for edge termination of super-junction (SJ) devices202010,566,324Integrated gate resistors for semiconductor power conversion devices202010,541,338Edge termination designs for silicon carbide super-junction power devices202010,541,300Semiconductor device and method of making thereof202010,403,711Designing and fabricating semiconductor devices with specific terrestrial cosmic ray (TCR) ratings201910,403,623Gate networks having positive temperature coefficients of resistance (PTC) for semiconductor power conversion devices201910,388,737Electric field shielding in silicon carbide metal-oxide-semiconductor (MOS) devices having an optimization layer201910,347,489Semiconductor devices and methods of manufacture201910,269,951Semiconductor device layout and method for forming same201910,243,039Super-junction semiconductor power devices with fast switching capability201910,211,304Semiconductor device having gate trench in JFET region201910,199,465Cellular layout for semiconductor devices201910,192,958Cellular layout for semiconductor devices201910,103,540Method and system for transient voltage suppression devices with active control201810,096,681Electric field shielding in silicon carbide metal-oxide-semiconductor (MOS) device cells201810,056,457Electric field shielding in silicon carbide metal-oxide-semiconductor (MOS) device cells using channel region extensions201810,014,388Transient voltage suppression devices with symmetric breakdown characteristics201810,002,920System and method for edge termination of super-junction (SJ) devices20189,899,512'Silicon carbide device and method of making thereof'20189,806,157'Structure and method for transient voltage suppression devices with a two-region base'20179,748,341'Metal-oxide-semiconductor (MOS) devices with increased channel periphery'20179,735,263'Transistor and switching system comprising silicon carbide and oxides of varying thicknesses, and method for providing the same'20179,735,237'Active area designs for silicon carbide super-junction power devices'20179,716,144'Semiconductor devices having channel regions with non-uniform edge'20179,704,949'Active area designs for charge-balanced diodes'20179,633,998'Semiconductor device and method for making the same'20179,570,560'Diffused junction termination structures for silicon carbide devices'20179,406,762'Semiconductor device with junction termination extension'20169,123,798'Insulating gate field effect transistor device and method for providing the same'20159,024,328'Metal-oxide-semiconductor (MOS) devices with increased channel periphery and methods of manufacture'20158,637,386'Diffused junction termination structures for silicon carbide devices and methods of fabricating silicon carbide devices incorporating same'2014Career & activity timeline
Assembled from patent assignee/location history and declaration credentials.
2014–2017Patents assigned to CREE INC (2)· patent assignee history
2014Patents assigned to AGARWAL ANANT K (1)· patent assignee history
2014Patents assigned to BOLOTNIKOV ALEXANDER (1)· patent assignee history
2014–2021Based in Niskayuna, NY, US· patent location history
2015–2021Patents assigned to GEN ELECTRIC (39)· patent assignee history
2017Patents assigned to BOLOTNIKOV ALEXANDER VIKTOROVICH (1)· patent assignee history
2019Based in Brooklyn, NY, US· patent location history
Inventor activity
Assignee and location history derived from the patent record.
Assignees
| Assignee | Patents | Span |
|---|---|---|
| GEN ELECTRIC | 39 | 2015–2021 |
| CREE INC | 2 | 2014–2017 |
| AGARWAL ANANT K | 1 | 2014 |
| BOLOTNIKOV ALEXANDERself | 1 | 2014 |
| BOLOTNIKOV ALEXANDER VIKTOROVICHself | 1 | 2017 |
Locations
| Location | Patents | Span |
|---|---|---|
| Niskayuna, New York, US | 40 | 2014–2021 |
| Brooklyn, New York, US | 1 | 2019 |