An embodiment electronic device comprises a semiconductor chip including a first main face, a second main face and side faces each connecting the first main face to the second main face. A metal layer is disposed above the second main face and the side faces, the metal layer including a porous structure.

Claims

12 · 2 independent · depth 3

12 granted claims

›1.independentAn electronic device comprising:na semiconductor chip comprising a first main face, a second main face, and side faces each connecting the first main …+5

›7.independentAn electronic device comprising:na semiconductor chip comprising a first main face, a second main face, and side faces each connecting the first main …+5

Classifications

7 codes

IPC · International Patent Classification

Section H — Electricity

H01L23/29
H01L29/40
H01L21/56
H01L23/00
H01L23/552
H01L23/48
H01L23/31

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Pendency

4.3 y

1,587 days filing → grant

Office actions

after a restriction

Responses

2 RCE

Examiner

David Goodwin

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Citations: 26 back · 3 forward

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Priority chain

1 priority documents

›Priority documents — 1

Type	Document	Date
related publication	US 20130105977 A1	2 May 2013

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