Isolating a PCI host bridge in response to an error event
Granted 28 Jul 2015 · 2 office actions
Current assignee: GlobalFoundries · originally International Business Machines
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Inventors: Jesse P. Arroyo, Anjam Kumar Guttahalli Krishna, Srinivas Kotta · Examiner: Joseph Kudirka · AU 2114 · TC 2100
Life of the patent
3 dated eventsAbstract
Instead of disabling PCI communication between system resources in a host computing device and I/O devices when a PCI Host Bridge (PHB) is unable to function, the host computing device may include a redundant PCI communication path for maintaining communication between the system resources and the I/O devices after a first PHB experiences an unrecoverable error. In one embodiment, the redundant PCI communication path includes a second PHB that is maintained in a standby state so long as the first PHB is functioning normally. However, once the first PHB experiences an unrecoverable error, the second PHB is changed to the master state and assumes the responsibility for maintaining communication between the system resources and the I/O devices.
Claims
13 · 2 independent · depth 3Classifications
4 codes- G06F13/40
- G06F11/20
- G06F11/00
- G06F11/14
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1 priority documents›Priority documents — 1
| Type | Document | Date |
|---|---|---|
| related publication | US 20150019903 A1 | 15 Jan 2015 |
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