Multigate metal oxide semiconductor devices and fabrication methods

A semiconductor device, comprising:na first well implanted in a semiconductor substrate;a second well implanted in the semiconductor substrate;a gate structure above the first and second wells;a raised source structure above and in contact with the first well and connected with the gate structure through a first semiconductor fin structure; anda raised drain structure above and in contact with the second well and connected with a second semiconductor fin structure,wherein the second semiconductor fin structure defines a gap along the second semiconductor fin structure that separates the second semiconductor fin structure from the raised drain structure.

A semiconductor device, comprising:na first well having a first well upper surface;a second well having a second well upper surface;a gate structure disposed on the first well upper surface and the second well upper surface;a raised source structure disposed above and in contact with the first well having a source upper surface higher in at least one location than the first well upper surface and connected with the gate structure through a first semiconductor fin structure; anda raised drain structure disposed on the second well and connected with the gate structure through a second semiconductor fin structure, wherein the second semiconductor fin structure is doped relatively lighter than the first semiconductor fin structure.

A semiconductor device, comprising:na first well implanted into a semiconductor substrate;a second well implanted into the semiconductor substrate;a gate structure partially on the first well and partially on the second well;a first semiconductor fin structure disposed on a first side of the gate structure and a second semiconductor fin structure disposed on a second side of the gate structure;a raised source structure above and in contact with the first well; anda raised drain structure above and in contact with the second well,wherein:the first semiconductor fin structure connects the gate structure and the raised source structure;the second semiconductor fin structure is disposed between the gate structure and the raised drain structure; andthe second semiconductor fin structure comprises:a gap separating the gate structure from the raised drain structure;a lightly doped region that is doped relatively lighter than the first semiconductor fin structure, or both.