A solid-state image pickup device, comprising:na semiconductor substrate containing a first active region;a first semiconductor region of a first conductive type;a second semiconductor region of a second conductive type;a third semiconductor region of the first conductive type;a floating diffusion region;a first transistor including a first transfer gate electrode and the floating diffusion region;a second transistor including a second transfer gate electrode and the floating diffusion region, andan insulator disposed between the first transfer gate and the semiconductor substrate,wherein the first, second and third semiconductor regions and the floating diffusion region are disposed in the first active region,wherein the second semiconductor region is disposed between the first semiconductor region and the third semiconductor region, andwherein a distance from an interface of the semiconductor substrate and the insulator to a position of an impurity concentration peak of a part of the first semiconductor region disposed to be overlapped with a part of the first transfer gate electrode is different from a distance from the interface to a position of an impurity concentration peak of the second semiconductor region.
›2.↳ 1The solid-state image pickup device according to claim 1,nwherein a part of the third semiconductor region is disposed to be overlapped with a part of…d2+1
The solid-state image pickup device according to claim 1,nwherein a part of the third semiconductor region is disposed to be overlapped with a part of the second transfer gate electrode.
›3.↳ 2The solid-state image pickup device according to claim 2, whereinnthe distance from the interface to the position of the impurity concentration peak o…d3
The solid-state image pickup device according to claim 2, whereinnthe distance from the interface to the position of the impurity concentration peak of the part of the third semiconductor region is different from the distance from the interface to the position of the impurity concentration peak of the second semiconductor region.
›4.↳ 1The solid-state image pickup device according to claim 1, wherein an area of the first semiconductor region projected onto a plane is larger than an a…d2
The solid-state image pickup device according to claim 1, wherein an area of the first semiconductor region projected onto a plane is larger than an area of the floating diffusion region projected onto a plane.
›5.↳ 1The solid-state image pickup device according to claim 1, wherein another part of the first transfer gate electrode is overlapped with a part of the s…d2
The solid-state image pickup device according to claim 1, wherein another part of the first transfer gate electrode is overlapped with a part of the second semiconductor region.
›6.↳ 1The solid-state image pickup device according to claim 1, further comprising:na fourth semiconductor region of the first conductive type disposed to b…d2+1
The solid-state image pickup device according to claim 1, further comprising:na fourth semiconductor region of the first conductive type disposed to be overlapped with the first semiconductor region, whereina position of an impurity concentration peak of the fourth semiconductor region and the position of the impurity concentration peak of the second semiconductor region are different from each other in depth based on the interface.
›7.↳ 6The solid-state image pickup device according to claim 6, wherein the first semiconductor region and the fourth semiconductor region are formed with d…d3
The solid-state image pickup device according to claim 6, wherein the first semiconductor region and the fourth semiconductor region are formed with different impurities.
›8.↳ 1The solid-state image pickup device according to claim 1, further comprising:na fifth semiconductor region of the second conductive type disposed to b…d2
The solid-state image pickup device according to claim 1, further comprising:na fifth semiconductor region of the second conductive type disposed to be overlapped with the second semiconductor region, whereina position of an impurity concentration peak of the fifth semiconductor region and the position of the impurity concentration peak of the first semiconductor region are different from each other in depth based on the interface.
›9.↳ 1The solid-state image pickup device according to claim 1, further comprising:na fourth semiconductor region of the first conductive type disposed to b…d2
The solid-state image pickup device according to claim 1, further comprising:na fourth semiconductor region of the first conductive type disposed to be overlapped with the first semiconductor region; anda fifth semiconductor region of the second conductive type disposed to be overlapped with the second semiconductor region, whereinpositions of the impurity concentration peaks of the first semiconductor region, the second semiconductor region, the fourth semiconductor region, and the fifth semiconductor region are different from each other in depth based on the interface.
›10.↳ 1The solid-state image pickup device according to claim 1, further comprising:na sixth semiconductor region of the second conductive type, whereinthe s…d2
The solid-state image pickup device according to claim 1, further comprising:na sixth semiconductor region of the second conductive type, whereinthe sixth semiconductor region is disposed to be overlapped with the first semiconductor region and the second semiconductor region and is disposed at a position closer to the interface than the first semiconductor region and the second semiconductor are.
›11.↳ 1The solid-state image pickup device according to claim 1, further comprising:na first photoelectric conversion portion and a second photoelectric conv…d2
The solid-state image pickup device according to claim 1, further comprising:na first photoelectric conversion portion and a second photoelectric conversion portion, whereinthe first semiconductor region constitutes a part of the first photoelectric conversion portion and the third semiconductor region constitutes a part of the second photoelectric conversion portion.
›12.↳ 1The solid-state image pickup device according to claim 1, wherein the second semiconductor region is a potential barrier against charges of the first …d2
The solid-state image pickup device according to claim 1, wherein the second semiconductor region is a potential barrier against charges of the first semiconductor region.
›13.↳ 1The solid-state image pickup device according to claim 1, wherein the second semiconductor region is an isolation region for electrically isolating th…d2
The solid-state image pickup device according to claim 1, wherein the second semiconductor region is an isolation region for electrically isolating the first semiconductor region from another element.
›14.↳ 1The solid-state image pickup device according to claim 1, wherein an arrangement direction of the first semiconductor region and the third semiconduct…d2
The solid-state image pickup device according to claim 1, wherein an arrangement direction of the first semiconductor region and the third semiconductor region is different from both a charge transfer direction from the first semiconductor region to the floating diffusion region and a charge transfer direction from the third semiconductor region to the floating diffusion region.
›15.↳ 1The solid-state image pickup device according to claim 1, further comprising:nan amplification portion configured to output a signal in accordance wit…d2
The solid-state image pickup device according to claim 1, further comprising:nan amplification portion configured to output a signal in accordance with transferred charges in the floating diffusion region,wherein a semiconductor substrate containing a second active region, an insulator isolation portion being disposed between the first active region and the second active region, andwherein the amplification portion is disposed in the second active region.
›16.↳ 1The solid-state image pickup device according to claim 1,nwherein a part of the first semiconductor region is disposed to be overlapped with a part of…d2
The solid-state image pickup device according to claim 1,nwherein a part of the first semiconductor region is disposed to be overlapped with a part of the first transfer gate electrode,wherein a part of the third semiconductor region is disposed to be overlapped with a part of the second transfer gate electrode, andwherein the second semiconductor region is disposed between the part of the first semiconductor region and the part of the third semiconductor region.
