A method for fabricating semiconductor devices includes: (a) forming a layered structure that includes a temporary substrate, a plurality of spaced apart sacrificial film regions on the temporary substrate, and a plurality of valley-and-peak areas among the sacrificial film regions; (b) growing laterally and epitaxially an epitaxial film layer over the sacrificial film regions and the valley-and-peak areas, wherein gaps are formed among the epitaxial film layer and the valley-and-peak areas; (c) forming a conductive layer to contact the epitaxial film layer; (d) forming a plurality of grooves to divide the epitaxial film layer and the conductive layer into a plurality of epitaxial structures on the temporary substrate; and (e) removing the temporary substrate and the sacrificial film regions from the epitaxial structures by etching the sacrificial film regions through the gaps and the grooves.

Claims

8 · 1 independent · depth 3

8 granted claims

›1.independentA method for fabricating semiconductor devices, comprising:n(a) forming a layered structure that includes a temporary substrate, a plurality of spaced…+7

›2.↳ 1The method of claim 1, wherein the forming of the layered structure includes the steps of forming and patterning a sacrificial film layer on the tempo…d2

›3.↳ 1The method of claim 1, wherein the forming of the layered structure includes the steps of roughening the temporary substrate to form peaks and valleys…d2

›4.↳ 1The method of claim 1, wherein the forming of the layered structure includes the steps of forming and lithographically etching a sacrificial film laye…d2

›5.↳ 1The method of claim 1, further comprising, before step (d), forming over the epitaxial film layer a patterned mask that covers partially the epitaxial…d2+1

›7.↳ 1The method of claim 1, further comprising, after step (e), (f) forming an electrode on a surface of each of the epitaxial structures.d2

›8.↳ 1The method of claim 1, wherein, in step (c), forming of the conductive layer is conducted by forming a reflective conductive film on the epitaxial fil…d2

Classifications

13 codes

IPC · International Patent Classification

Section H — Electricity

H01L33/00
H01L23/31
H01L21/78
H01L21/00
H01L21/02
H01L21/683
H01L29/06

USPC · US Patent Classification

438/464438/481438/704257/E21.599257/626257/622

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Pendency

2.8 y

1,012 days filing → grant

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Examiner

Alonzo Chambliss

art unit 2897 · TC 2800

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Citations: 6 back · 0 forward

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1 priority documents

›Priority documents — 1

Type	Document	Date
related publication	US 20120077334 A1	29 Mar 2012

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