Multi-output switching power supply device having a step-up/down converter between a stabilized output and a non-stabilized output

The present invention relates to a multi-output switching power supply device and, more particularly, to a switching power supply device capable of stabilizing, using a means with less power loss, voltage of a non-stabilized output which is not regulated by voltage stabilization feedback control from a secondary side to a primary side.

In general, a conventional switching power supply having two or more out voltage lines on the secondary side of one transformer has a configuration in which feedback control is performed for a primary side control circuit in order to obtain stable constant voltage at the side at which load power is high, and other output voltages are made to pass through a step-down circuit such as a dropper circuit or chopper circuit for obtaining stable voltages, respectively. However, in the above configuration, it is inevitable that the dropper circuit constantly generates power loss or the chopper circuit generates loss at conversion time.

FIG. 17 illustrates an example of 12 V output current vs. 12 V output voltage characteristics obtained in the case where the secondary side has two outputs of 12 V and 24 V and where 24 V output is set as a stabilized output (hereinafter, output that is fed back to the primary side control circuit is referred to as “stabilized output”) and 12 V output is set as a non-stabilized output (the other output that is not fed back to the primary side control circuit is referred to as “non-stabilized output”). FIG. 18 illustrates an example of 24 V output current vs. 12 V output voltage characteristics obtained in the case where the secondary side has two outputs of 12 V and 24 V and where 24 V output is set as the stabilized output and 12 V output is set as the non-stabilized output. Thus, the voltage of 12 V output which is the non-stabilized output varies depending on the load state of 12 V output or 24 V output.

There exists an efficiency-oriented method that improves the winding voltage and structure of a transformer to reduce a variation in a secondary side winding so as to suppress a voltage variation of the non-stabilized output with respect to a current change of the stabilized output. However, the voltage accuracy of the non-stabilized output is worse than that of the stabilized output and, thus, the variation range of output voltage becomes wide. Further, when the current of the stabilized output reaches an overcurrent region, surge voltage occurs in a transformer winding of the non-stabilized output due to influence of leakage inductance existing in the transformer, significantly increasing the voltage of the non-stabilized output. Further, in the case where the non-stabilized output is stabilized by the dropper circuit, the input voltage of the dropper circuit sometimes rises to exceed a maximum rated voltage.

In order to solve the above problems, conventional arts such as Patent Documents 1 to 3 propose a method in which power is supplied from a relatively high voltage side output to a relatively low voltage side output through a dropper circuit so as to improve the voltage accuracy of the non-stabilized output.

Patent Document

Patent Document 1: Jpn. Pat. Appln. Laid-Open Publication No. 4-33571

Patent Document 2: Jpn. Pat. Appln. Laid-Open Publication No. 3-82367

Patent Document 3: Jpn. Pat. Appln. Laid-Open Publication No. 57-129131

Problems to be Solved by the Invention

However, in the method of the above conventional arts, power is supplied from a relatively high voltage side output to a relatively low voltage side output through a dropper circuit which generates relatively large power loss so as to improve the voltage accuracy of a non-stabilized output, so that power supply efficiency is low and heat generated from the dropper circuit is high.

Further, in the method of the above conventional arts, the magnitude relationship between voltage of the stabilized output and voltage of the non-stabilized output is restricted. That is, the dropper circuit can operate only under a condition satisfying (voltage of stabilized output)>(voltage of non-stabilized output) in the techniques of Patent Documents 1 and 2 or satisfying (voltage of stabilized output)<(voltage of non-stabilized output) in the technique of Patent Document 3.

Further, the method of the above conventional arts has no effect of suppressing a variation in DC output voltage with respect to a dynamic load change.

In view of the above problems, an object of the present invention is to provide a multi-output switching power supply device capable of improving power supply efficiency and increasing accuracy of DC output voltage.

Means for Solving the Problems

A switching power supply device according to the present invention is a device that converts an AC power supply inputted to a primary side into a plurality of secondary side DC power supplies for output, wherein: one DC power supply of the plurality of DC power supplies is a stabilized output having a voltage stabilizing means for stabilizing the output voltage by feeding back the output voltage to the primary side; the rest of the DC power supplies is non-stabilized outputs not having a voltage stabilizing means for feeding back the output voltage to the primary side; and a converter is provided, which supplies power from the stabilized output when the output voltage of the non-stabilized output falls below a first predetermined voltage, and regenerates power from the non-stabilized output to the stabilized output when the output voltage of the non-stabilized output exceeds a second predetermined voltage.

In the switching power supply device of the present invention, the converter is a step-up/down converter having a step-up converter function and a step-down converter function, and the output voltage of the stabilized output is set higher than the output voltage of the non-stabilized output, the step-up/down converter uses the step-down converter function to step-down the output voltage of the stabilized output to supply power to the non-stabilized output when the output voltage of the non-stabilized falls below the first predetermined voltage, and the step-up/down converter uses the step-up converter function to step-up the output voltage of the non-stabilized output to regenerate power to the stabilized output when the output voltage of the non-stabilized output exceeds the second predetermined voltage.

In the switching power supply device of the present invention, the first and second predetermined voltages are each set within a voltage accuracy range which is defined such that the output voltage accuracy of the non-stabilized output assumes a predetermined accuracy, and the second predetermined voltage is set higher than the first predetermined voltage by a predetermined potential difference.

Further, a switching power supply device according to the present invention is a device that converts an AC power supply inputted to a primary side into a plurality of secondary side DC power supplies for output, wherein one DC power supply of the plurality of DC power supplies is a stabilized output having a voltage stabilizing means for stabilizing the output voltage by feeding back the output voltage to the primary side, the rest of the DC power supplies are non-stabilized outputs not having voltage stabilizing means for feeding back the output voltage to the primary side, and a step-up/down converter having first and second switch elements alternately tuned on/off and a reactor is connected between the stabilized output and the non-stabilized output, and the step-up/down converter applies/receives power between the stabilized output and the non-stabilized output in accordance with the output voltage of the non-stabilized output.

In the switching power supply device of the present invention, the step-up/down converter turns on/off the first and second switch elements with a constant duty ratio corresponding to the ratio between the output voltage of the stabilized output and the output voltage of the non-stabilized output.

In the switching power supply device of the present invention, the step-up/down converter controls the duty ratio between the first and second switch elements such that the output voltage of the non-stabilized output assumes a predetermined voltage.

In the switching power supply device of the present invention, the step-up/down converter has a means for detecting current flowing in the reactor and restricts the current flowing in the reactor by a predetermined current value during the ON periods of the first and second switch elements.

In the switching power supply device of the present invention, the step-up/down converter has a means for detecting current flowing in the reactor and controls the peak value of the current flowing in the reactor during the ON periods of the first and second switch elements such that the output voltage of the non-stabilized output assumes a predetermined voltage.

According to the present invention, there can be provided a multi-output switching power supply device capable of improving power supply efficiency and increasing accuracy of DC output voltage.

FIG. 1 is a circuit configuration diagram of a switching power supply device according to a first embodiment of the present invention.

FIG. 2 is a view for explaining output voltage characteristics of the switching power supply device according to the embodiment of the present invention.

FIG. 3 is a circuit configuration diagram of a step-up/down converter in the switching power supply device according to the first embodiment of the present invention.

FIG. 4 is a view for explaining operation of the step-up/down converter in the switching power supply device according to the first embodiment of the present invention.

FIG. 5 is a view for explaining a step-down operation of the step-up/down converter in the switching power supply device according to the first embodiment of the present invention.

FIG. 6 is a view for explaining a step-up operation of the step-up/down converter in the switching power supply device according to the first embodiment of the present invention.

FIG. 7 is a view for explaining an output voltage variation at the time of a dynamic load change in the switching power supply device according to the first embodiment of the present invention.

FIG. 8 is a basic circuit configuration diagram of a step-up/down converter in a switching power supply device according to a second embodiment of the present invention.

FIG. 9 is a view for explaining operation of a secondary side control circuit in the switching power supply device according to the second embodiment of the present invention.

FIG. 10 is a view for explaining operation of the step-up/down converter in the switching power supply device according to the second embodiment of the present invention.

FIG. 11 is a view for explaining a step-down operation of the step-up/down converter in the switching power supply device according to the second embodiment of the present invention.

FIG. 12 is a view for explaining a step-up operation of the step-up/down converter in the switching power supply device according to the second embodiment of the present invention.

FIG. 13 is a basic circuit configuration diagram of a step-up/down converter in a switching power supply device according to a third embodiment of the present invention.

FIG. 14 is a basic circuit configuration diagram of a step-up/down converter in a switching power supply device according to a fourth embodiment of the present invention.

FIG. 15 is a basic circuit configuration diagram of a step-up/down converter in a switching power supply device according to a fifth embodiment of the present invention.

FIG. 16 is a view for explaining operation of the step-up/down converter in the switching power supply device according to the fifth embodiment of the present invention.

FIG. 17 is a view for explaining output voltage characteristics of a switching power supply device according to a conventional art.

FIG. 18 is a view for explaining output voltage characteristics of a switching power supply device according to a conventional art.

Embodiments for carrying out the present invention will be described concretely below with reference to the accompanying drawings.

First Embodiment

FIG. 1 is a configuration diagram of a switching power supply device including a step-up/down converter according to a first embodiment of the present invention.

A power conversion circuit provided in the switching power supply device 1 of FIG. 1 is a flyback converter. However, this is illustrative only, and the power conversion circuit of the switching power supply device 1 is not limited to the flyback converter, but may be any power conversion circuit as long as it can realize multi-output using secondary side winding voltages. Further, as the switching power supply device 1 , a multi-output switching power supply device having a 24 V output and a 12 V output on the secondary side in which the 24 V output is set as a stabilized output and 12 V output is set as a non-stabilized output is illustrated. However, this is not intended to limit the configuration of the switching power supply device 1 . That is, it is possible to arbitrarily determine which of the outputs is set as the stabilized output or non-stabilized output. As a matter of course, the set voltage of the multi-output is not limited to 12 V or 24 V.

Hereinafter, a circuit configuration of the switching power supply device 1 will be described.

An input terminal TM 1 and an input terminal TM 2 are provided on the primary side of the switching power supply device 1 . The input terminals TM 1 and TM 2 are connected to an AC power supply 2 such as a single-phase 100 V (50 Hz, 60 Hz) commercial power supply. A 24 V output terminal TM 3 , a 12 V output terminal TM 4 , and a GND terminal are provided on the secondary side of the switching power supply device 1 . A load Ld 1 is connected between the 24 V output terminal TM 3 and the GND terminal, and a load Ld 2 is connected to between the 12 V output terminal TM 4 and the GND terminal.

The AC power supply 2 is connected to a full-wave rectifier bridge 3 through the input terminals TM 1 and TM 2 , and AC voltage of the AC power supply 2 is converted into DC voltage by the full-wave rectifier bridge 3 . The pulsation contained in the DC output voltage of the full-wave rectifier bridge 3 is smoothed by a capacitor C 6 connected between positive and negative output terminals of the full-wave rectifier bridge 3 into DC voltage with little pulsation.

The switching power supply device 1 includes a transformer T 1 having a primary winding P 1 , secondary windings S 1 and S 2 , and a tertiary winding P 2 . The positive output terminal of the full-wave rectifier bridge 3 is connected to one terminal of the primary winding P 1 of the transformer T 1 , and the other terminal of the primary winding P 1 is connected to the drain terminal of a MOSFET Q 3 serving as a switch element. The source terminal of the MOSFET Q 3 is connected to the negative output terminal (hereinafter, a line connected to the negative output terminal of the full-wave rectifier bridge 3 is referred to as a ground potential GND 1 ) of the full-wave rectifier bridge 3 through a resistor R 2 . A capacitor C 5 is connected between the other terminal of the primary winding P 1 and the ground potential GND 1 . Further, a series combination obtained by connecting in series a parallel combination of resistor R 3 and a capacitor C 4 and a diode D 6 whose forward direction is directed from the other terminal of the primary winding P 1 to the one terminal thereof is connected between the both terminals of the primary winding P 1 .

One terminal of the secondary winding S 1 of the transformer T 1 is connected to the anode terminal of a diode D 3 , and the cathode terminal of the diode D 3 is connected to the 24 V output terminal TM 3 . One terminal of a capacitor C 1 is connected between the cathode terminal of the diode D 3 and the 24 V output terminal TM 3 , and the other terminal thereof is connected to an output ground terminal GND (hereinafter, a line connected to the output ground terminal GND is referred to as a ground potential GND 2 ) of the switching power supply device 1 . The other terminal of the secondary winding S 1 of the transformer T 1 and the one terminal of the secondary winding S 2 are connected to each other, and the other terminal of the secondary winding S 2 is connected to the ground potential GND 2 . As described above, the secondary windings S 1 and S 2 of the transformer T 1 are connected in series to be connected to a rectification smoothing circuit 11 including the diode D 3 and the capacitor C 1 , thereby outputting 24 V DC voltage to the 24 V output terminal TM 3 .

The other terminal of the secondary winding S 1 of the transformer T 1 and the one terminal of the secondary winding S 2 are connected to each other. A tap is taken from the connection point and is connected to the anode terminal of a diode D 4 . The cathode terminal of the diode D 4 is connected to the 12 V output terminal TM 4 . One terminal of a capacitor C 2 is connected between the cathode terminal of the diode D 4 and the 12 V output terminal TM 4 , and the other terminal of the capacitor C 2 is connected to the ground potential GND 2 . As described above, the secondary winding S 2 of the transformer T 1 is connected to a rectification smoothing circuit 12 composed of the diode D 4 and the capacitor C 2 , thereby outputting 12 V DC voltage to the 12 V output terminal TM 4 .

A primary side control circuit 4 is a control circuit that controls a power conversion circuit constituted by the transformer T 1 , MOSFET Q 3 , and the like, that is, a flyback converter. A power supply for the primary side control circuit 4 is created by the tertiary winding P 2 of the transformer T 1 , a diode D 5 , a capacitor C 3 , a starting resistor R 1 , and the like and is supplied to the primary side control circuit 4 .

The voltage of the secondary side 24 V output is fed back to the primary side control circuit 4 so as to stabilize the voltage of the 24 V output. That is, a series combination of the light-emission side of a photocoupler PC and a voltage detector 6 is connected between the 24 V output terminal and the ground potential GND 2 , and the light-reception side of the photocoupler PC is connected between a control input terminal of the primary side control circuit 4 and the ground potential GND 1 .

A step-up/down converter 13 a for stabilizing a non-stabilized output is connected to the 24 V output and 12 V output. That is, the source terminal of a switch element Q 1 (P-type MOSFET) is connected to the connection point of the diode D 3 and the 24 V output terminal TM 3 , the drain terminal of the switch element Q 1 is connected to the drain terminal of a switch element Q 2 (N-type MOSFET), and the source terminal of the switch element Q 2 is connected to the ground potential GND 2 . Further, diodes D 1 and D 2 are connected in reverse parallel with the switch element Q 1 and switch element Q 2 , respectively, so as to cause current to flow in the reverse direction to the current direction of the switch elements Q 1 and Q 2 . Further, one terminal of a reactor L 1 is connected to the connection point at which the drain terminal of the switch element Q 1 and the drain terminal of the switch element Q 2 are connected to each other, and the other end of the reactor L 1 is connected to the 12 V output terminal TM 4 . Control terminals of a secondary side control circuit 5 a that ON/OFF controls the switch elements Q 1 and Q 2 are connected to the gate terminals of the switch elements Q 1 and Q 2 .

Next, operation of the switching power supply device 1 of the present embodiment having the configuration as described above will be described. The switching power supply device 1 of the present embodiment has a feature in the step-up/down converter 13 a , and the portions other than the step-up/down converter 13 a are the same as those in a power conversion circuit using a well-known flyback converter, so that details of the operation are omitted here.

First, characteristics of the 12 V output and 24 V output in the case where the step-up/down converter 13 a is not connected (i.e., in the case of the conventional art) will be described.

In FIG. 2 , thin dash-dotted lines denote the voltage characteristics of the 12 V output which are the same as the characteristics illustrated in FIG. 17 . The voltage characteristics of the upper side 12 V output is the 12 V output voltage characteristics with respect to 12 V output current when the 24 V output is rated load. The voltage characteristics of the lower side 12 V output is the 12 V output voltage characteristics with respect to 12 V output current when the 24 V output is light load (or no load). As illustrated, the 12 V output voltage exhibits characteristics in which it decreases with an increase in the 12 V output current under the condition that the 24 V output current is constant. Further, the 12 V output voltage exhibits characteristics in which it is influenced by a load state of the 24 V output and decreases as the load state of the 24 V output is changed from rated load to no load as illustrated in FIG. 18 .

As described above, even if the 12 V output current is constant, output voltage of the 12 V output significantly changes depending on the load state of the 24 V output. That is, so called cross regulation characteristics become prominent. For example, in the example of FIG. 2 , the 12 V output voltage at the time when the 24 V output is rated load current increases up to about 14 V at the time when the output current is 0% and decreases to about 10 V to 11 V at the time when the output current is 100%. Assuming that the voltage accuracy of the 12 V output voltage is set within 5% (11.4 V to 12.6 V), the accuracy is not satisfied at all.

Next, operation of the switching power supply device 1 of FIG. 1 in which the step-up/down converter 13 a is connected between the 24 V output line and 12 V output line in order to apply the present invention will be described.

In FIG. 2 , the characteristics of two solid lines denote the voltage characteristics of the 12 V output to which the present invention has been applied. The characteristics of the upper side solid line is the 12 V output voltage characteristics with respect to 12 V output current when the 24 V output is rated load, and the characteristics of the lower side solid line is the 12 V output voltage characteristics with respect to 12 V output current when the 24 V output is light load (or no load).

Although the function of the step-up/down converter 13 a will be described later in detail, when the 12 V output voltage decreases to a first predetermined voltage (a first predetermined voltage set within a voltage accuracy range defined by dotted lines of FIG. 2 ) or less, power is supplied from the 24 V output line to the 12 V output line through a step-down process (step-down converter function of the step-up/down converter 13 a ) so as to compensate for power deficiency, which will also be described later in detail with reference to FIG. 5 . This operation is denoted by upward arrows of FIG. 2 .

When the 12 V output voltage increases to a second predetermined voltage (a second predetermined voltage set within a voltage accuracy range defined by dotted lines of FIG. 2 ) or more, excess power is raised from the 12 V output line to 24 V output line for regeneration (step-up converter function of the step-up/down converter 13 a ), which will also be described later in detail with reference to FIG. 6 . This operation is denoted by a downward arrow of FIG. 2 .

As illustrated in FIG. 2 , it is assumed that the first predetermined voltage and second predetermined voltage are included in the 12 V output voltage accuracy and that the second predetermined voltage is set higher than the first predetermined voltage by a predetermined potential difference. According to the present embodiment, it is possible to make the 12 V output voltage accuracy fall within a required voltage accuracy, e.g., 5% by the action of the step-up/down converter 13 a.

The selection of the ratio between the number of windings of the secondary windings S 1 and S 2 will be described. The rectification smoothing circuit 12 previously selects the ratio S 1 :S 2 between the number of windings of the secondary windings S 1 and S 2 of the transformer T 1 such that the 12 V output voltage outputs a voltage slightly below 12 V, e.g., 11 V under the condition that the 24 V output is rated load and the 12 V output is rated load. Alternatively, the rectification smoothing circuit 12 previously selects the ratio S 1 :S 2 between the number of windings of the secondary windings S 1 and S 2 of the transformer T 1 such that the maximum value of the 12 V output voltage does not exceed an upper limit value specified by the voltage accuracy of the 12 V output under the minimum load condition that the 24 V output is light load or no load.

FIG. 3 is a view illustrating a more detailed configuration of the step-up/down converter 13 a and the secondary side control circuit 5 a that performs control in the step-up/down converter 13 a so as to stabilize the 12 V output. In FIG. 3 , a portion surrounded by a dotted frame corresponds to the secondary side control circuit 5 a . The secondary side control circuit 5 a is constituted by operational amplifiers OP 1 and OP 2 , comparators CP 1 and CP 2 , a reference voltage Vref 1 , a triangle wave oscillator OSC, resistors R 4 to R 10 , capacitors C 7 and C 9 , and the like.

The resistors R 4 , R 5 , and R 6 are connected in series between the 12 V output terminal TM 4 and the ground terminal GND. Thus, voltage Vcv 1 at the connection point of the resistors R 4 and R 5 corresponds to voltage obtained by dividing the voltage of the 12 V output in a ratio of (R 4 ):(R 5 +R 6 ), and voltage Vcv 2 at the connection point of the resistors R 5 and R 6 corresponds to voltage obtained by dividing the voltage of the 12 V output in a ratio of (R 4 +R 5 ):(R 6 ). The connection point of the resistors R 4 and R 5 is connected to the non-inverting input terminal of the operational amplifier OP 1 , and the connection point of the resistors R 5 and R 6 is connected to the non-inverting input terminal of the operational amplifier OP 2 .

The reference voltage Vref 1 is input to the inverting input terminals of the operational amplifiers OP 1 and OP 2 through the resistors R 8 and R 10 , respectively. A series combination of the resistor R 7 and capacitor C 7 is connected between the output terminal and inverting input terminal of the operational amplifier OP 1 as a negative feedback impedance, and a series combination of the resistor R 9 and capacitor C 9 is connected between the output terminal and inverting input terminal of the operational amplifier OP 2 as a negative feedback impedance. The output terminal of the operational amplifier OP 1 is connected to the non-inverting input terminal of the comparator CP 1 , and the output terminal of the operational amplifier OP 2 is connected to the non-inverting input terminal of the comparator CP 2 .

A signal from the triangle wave oscillator OSC is input to the inverting input terminals of the comparators CP 1 and CP 2 . The output terminal of the comparator CP 1 is connected to the gate terminal of the switch element Q 1 , and the output terminal of the comparator CP 2 is connected to the gate terminal of the switch element Q 2 .

In the configuration of the step-up/down converter 13 a , a circuit constructed as a step-down converter is constituted by the switch element Q 1 , diode D 2 connected in reverse parallel with the switch element Q 2 , reactor L 1 , and capacitor C 2 .

In the configuration of the step-up/down converter 13 a , a circuit constructed as a step-up converter is constituted by the switch element Q 2 , diode D 1 connected in reverse parallel with the switch element Q 1 , reactor L 1 , and capacitor C 2 .

The switching of the operation of step-up/down converter is performed by the operational amplifiers OP 1 and OP 2 and comparators CP 1 and CP 2 .

When the voltage of the 12 V output decreases to the first predetermined voltage set within the voltage accuracy range illustrated in FIG. 2 or less, the step-up/down converter 13 a detects the decrease in the voltage and operates so as to supply power from the 24 V output to the 12 V output to restore the voltage of the 12 V output. The 12 V output receives power from the 24 V output and the voltage level thereof is restored to the first predetermined voltage. The operation of the step-up/down converter 13 a functioning as the step-down converter will be described in detail below.

As illustrated in FIG. 3 , voltage at the connection point of the resistors R 4 and R 5 is obtained, as the voltage Vcv 1 obtained by dividing the voltage of the 12 V output in a ratio of (R 4 ):(R 5 +R 6 ) by the resistors R 4 , R 5 , and R 6 connected in series between the 12 V output terminal TM 4 and the ground terminal GND. A difference between the voltage Vcv 1 and reference voltage Vref 1 is calculated by the operational amplifier OP 1 and the calculated difference becomes an output Vop 1 of the operational amplifier OP 1 . The output Vop 1 of the operational amplifier OP 1 is then input to the non-inverting input terminal of the comparator CP 1 and compared to a triangle wave signal input thereto from the triangle wave oscillator OSC. The Vop 1 and OSC during a time period Ta of FIG. 4 illustrate a relationship between the output Vop 1 of the operational amplifier OP 1 and signal voltage of the triangle wave oscillator OSC. The comparator CP 1 turns its output signal Vcp 1 into a low level signal and turns a gate signal Vg 1 of the switch element Q 1 into an ON signal (low level signal) in a time period during which the output Vop 1 of the operational amplifier OP 1 is lower than the triangle wave signal OSC. This operating waveform is illustrated as a signal waveform Vg 1 during a time period Ta of FIG. 4 . When the voltage of the 12 V output gradually increases, the output Vop 1 of the operational amplifier OP 1 further increases, resulting in absence of a time period during which the output Vop 1 and triangle wave signal OSC cross each other. In this state, the output Vcp 1 of the comparator CP 1 is fixed to a high level, and the gate signal Vg 1 (=output Vcp 1 of the comparator CP 1 ) of the switch element Q 1 is kept at an OFF signal (high level signal) (time period Tb and time period Tc).

In the step-down converter of the step-up/down converter 13 a , when the output signal Vg 1 of the comparator CP 1 in FIG. 3 is supplied to the gate of the switch element Q 1 as an ON signal (low level signal), the switch element Q 1 is turned on to cause current to flow from the 24 V output to the load Ld 2 through the switch element Q 1 , reactor L 1 , and 12 V output terminal TM 4 like current i 1 of FIG. 5 , whereby power is supplied from the 24 V output to 12 V output. When the output signal Vg 1 of the comparator CP 1 of FIG. 3 is supplied to the gate of the switch element Q 1 as an OFF signal (high level signal), the switch element Q 1 is turned off to cause the current it flowing in the reactor L 1 to flow as circulation current through the reactor L 1 , load Ld 2 , and diode D 2 like i 2 of FIG. 5 . At this time, the switch element Q 2 is kept at an OFF state. The percentage of ON-period of the switch element Q 1 relative to one cycle of the triangle wave signal OSC increases as the voltage of the 12 V output decreases, so that the step-down converter operates such that the percentage of power supplied from the 24 V output to 12 V output increases.

When the voltage of the 12 V output exceeds the second predetermined voltage set within the voltage accuracy range of FIG. 2 , the step-up/down converter 13 a detects the increase in the voltage and regenerates power from the 12 V output to the 24 V output side in order to restore the voltage of the 12 V output so as to decrease the voltage of the 12 V output to the second predetermined voltage. The 12 V output is regenerated to the 24 V output for power supply and the voltage level thereof is restored to the second predetermined voltage. The operation of the step-up/down converter 13 a functioning as the step-up converter will be described in detail below.

As illustrated in FIG. 3 , voltage at the connection point of the resistors R 5 and R 6 is obtained, as the voltage Vcv 2 obtained by dividing the voltage of the 12 V output in a ratio of (R 4 +R 5 ):(R 6 ) by the resistors R 4 , R 5 , and R 6 connected in series between the 12 V output terminal TM 4 and the ground terminal GND. A difference between the voltage Vcv 2 and the reference voltage Vref 1 is calculated by the operational amplifier OP 2 and the calculated difference becomes an output Vop 2 of the operational amplifier OP 2 . The output Vop 2 of the operational amplifier OP 2 is then input to the non-inverting input terminal of the comparator CP 2 and compared to a triangle wave signal input thereto from the triangle wave oscillator OSC. The Vop 2 and OSC during a time period Tc of FIG. 4 illustrate a relationship between the output Vop 2 of the operational amplifier OP 2 and signal voltage of the triangle wave oscillator OSC. The comparator CP 2 turns its output signal Vcp 2 into a high level signal and turns a gate signal Vg 2 of the switch element Q 2 into an ON signal (high level signal) in a time period during which the output Vop 2 of the operational amplifier OP 2 is higher than the triangle wave signal OSC. This operating waveform is illustrated as a signal waveform Vg 2 during a time period Tc of FIG. 4 . When the voltage of the 12 V output gradually increases, the output Vop 2 of the operational amplifier OP 2 increases, resulting in an increase in a time period during which the output Vop 2 and triangle wave signal OSC cross each other. The output Vcp 2 of the comparator CP 2 outputs high level voltage in a time period during which the output Vop 2 of the operational amplifier OP 2 and the triangle wave signal OSC cross each other, so that an ON signal which is the gate signal Vg 2 of the switch element Q 2 is outputted.

During the time period Ta and time period Tb illustrated in FIG. 4 , the output Vop 2 of the operational amplifier OP 2 and triangle wave signal OSC do not cross each other at all, and the gate signal Vg 2 of the switch element Q 2 is kept at an OFF signal (low level signal).

In the step-up converter of the step-up/down converter 13 a , when the output signal Vg 2 of the comparator CP 2 in FIG. 3 is supplied to the gate of the switch element Q 2 as an ON signal (high level signal), the switch element Q 2 is turned on to cause current to flow from the 12 V output in a loop including the reactor L 1 and the switch element Q 2 like current i 3 of FIG. 6 . When the output signal Vg 2 of the comparator CP 2 of FIG. 3 is supplied to the gate of the switch element Q 2 as an OFF signal (low level signal), the switch element Q 2 is turned off to cause the current flowing in the reactor L 1 to flow through the load Ld 2 , reactor L 1 , and diode D 1 like current i 4 of FIG. 6 , with the result that the current of 12 V output flows in the 24 V output side as regeneration current. At this time, the switch element Q 1 is kept at an OFF state. The percentage of ON-period of the switch element Q 2 relative to one cycle of the triangle wave signal OSC increases as the voltage of the 12 V output increases, so that the step-up converter operates such that the percentage of power regenerated from the 12 V output to the 24 V output increases.

As described above, the switching of the operation of step-up/down converter is performed in a range between the input voltages Vcv 1 and Vcv 2 of the operational amplifiers OP 1 and OP 2 . There exists a potential difference between the Vcv 1 and Vcv 2 , the step-up converter operation and step-down converter operation are not performed at the same time. Further, although the voltage level is different, the voltages Vcv 1 and Vcv 2 correspond to the first and second predetermined voltages in FIG. 3 , respectively.

The time period Tb in FIG. 4 is a time period during which neither the switch elements Q 1 and Q 2 perform ON/OFF operation.

In general, in the stabilized output, the feedback to the primary side allows stable voltage to be obtained; however, feedback control delays with respect to a change in the dynamic load in which a load changes suddenly and, thus, voltage transiently drops. The present embodiment works well also for the voltage drop and can reduce the voltage drop.

According to the present embodiment, in the case of a change in the dynamic load, the voltage dip of the 24 V output voltage can be improved, and the voltage accuracy due to influence of the cross regulation can be improved by voltage regeneration on the 12 V output voltage to the 24 V output. FIG. 7 illustrates changes in the 12 V output voltage and 24 V output voltage obtained when the 24 V output current is changed from light load (about 10%) to rated load (100%) in a stepwise fashion in both the switching power supply device 1 (present embodiment to which the present invention has been applied) and the conventional art (switching power supply device not having the step-up/down converter 13 a in FIG. 1 ) to which the present invention is not applied. As is clear from FIG. 7 , the transient voltage drop of the 24 V output voltage due to a sudden change in the load has been improved. Further, surplus power of the 12 V output voltage has nowhere to go at the time point when the 24 V load has become light load, so that the 12 V output voltage slightly increases; however, the power is regenerated on the 12 V output voltage to the 24 V output, thereby improving the degradation in the voltage accuracy due to influence of the cross regulation.

Second Embodiment

A second embodiment according to the present invention will be described. The switching power supply device 1 of the present embodiment has a step-up/down converter 13 b of FIG. 8 in place of the step-up/down converter 13 a of FIG. 1 . The switch element Q 1 in the step-up/down converter 13 a of the first embodiment is a P-type MOSFET, while a switch element Q 21 of the present embodiment corresponding to the switch element Q 1 is an N-type MOSFET. That is, the drain terminal of the switch element Q 21 is connected to the connection point of the diode D 3 and the 24 V output terminal TM 3 , the source terminal of the switch element Q 21 is connected to the drain terminal of the switch element Q 2 , and the source terminal of the switch element Q 2 is connected to the ground potential GND. Further, the diodes D 1 and D 2 are connected in reverse parallel with the switch element Q 21 and the switch element Q 2 , respectively, so as to cause current to flow in the reverse direction to the current direction of the switch elements Q 21 and Q 2 . The diodes D 1 and D 2 may be replaced by parasitic diodes of the switch elements Q 21 and Q 2 , respectively. One terminal of the reactor L 1 is connected to the connection point of the source terminal of the switch element Q 21 and the drain terminal of the switch element Q 2 , and the other terminal of the reactor L 1 is connected to the 12 V output terminal TM 4 . Control terminals of a secondary side control circuit 5 b that ON/OFF controls the switch elements Q 21 and Q 2 are connected to the gates of the switch elements Q 21 and Q 2 . The secondary side control circuit 5 b of the present embodiment is different in configuration from the secondary side control circuit 5 a of the first embodiment. Also in the second embodiment, it is possible to use a p-type MOSFET as the switch element Q 21 by logic recombination.

In the present embodiment, although details will be described later with reference to FIG. 11 , when the ratio of the 12 V output voltage relative to the 24 V output voltage decreases, the step-up/down converter 13 b supplies power from the 24 V output line to the 12 V output line through a step-down process so as to compensate for power deficiency (step-down converter function of the step-up/down converter 13 b ). This operation is denoted by upward arrows of FIG. 2 .

Although details will be described later with reference to FIG. 12 , when the ratio of the 12 V output voltage relative to the 24 V output voltage increases, the step-up/down converter 13 b raises excess power from the 12 V output line to the 24 V output line for supply (step-up converter function of the step-up/down converter 13 b ). This operation is denoted by a downward arrow of FIG. 2 .

According to the present embodiment, it is possible to make the 12 V output voltage accuracy fall within a required voltage accuracy, e.g., 5% by the action of the step-up/down converter 13 b.

FIG. 8 is a view illustrating a detailed configuration of the step-up/down converter 13 b and the secondary side control circuit 5 b that performs ON/OFF control for the switch element Q 21 and switch element Q 2 in the step-up/down converter 13 b . In FIG. 8 , a portion surrounded by a dotted frame corresponds to the secondary side control circuit 5 b . The secondary side control circuit 5 b is constituted by comparators CP 1 and CP 2 , a reference voltage Vref 2 , a triangle wave oscillator OSC, resistors R 24 and R 25 , a driver Hdr, and the like.

Although not illustrated, it is preferable to provide a circuit having a dead-time period during which the switch elements Q 21 and Q 2 are not turned on at the same time in their ON/OFF switching time in the ON/OFF control of the switch elements Q 21 and Q 2 .

The resistors R 24 and R 25 are connected in series to both terminals of the reference voltage Vref 2 . Thus, voltage Vadj at the connection point of the resistors R 24 and R 25 corresponds to voltage obtained by dividing the voltage of the reference voltage Vref in a ratio of R 24 :R 25 . The connection point of the resistors R 24 and R 25 is connected to the non-inverting input terminal of the comparator CP 1 and inverting input terminal of the comparator CP 2 .

A signal from the triangle wave oscillator OSC is input to the inverting input terminal of the comparator CP 1 and non-inverting input terminal of the comparator CP 2 . The output terminal of the comparator CP 1 is connected to the gate terminal of the switch element Q 21 through a driver Hdr that level-shifts a signal output from the comparator CP 1 to a signal based on the source terminal of the switch element Q 21 , and the output terminal of the comparator CP 2 is connected to the gate terminal of the switch element Q 2 .

Operation of the secondary side control circuit 5 b will be described in detail below.

As illustrated in FIG. 8 , voltage at the connection point of the resistors R 24 and R 25 is obtained, as the voltage Vadj obtained by dividing the reference voltage Vref 2 in a ratio of R 24 :R 25 by the resistors R 24 and R 25 connected in series between the reference voltage Vref 2 and the ground potential GND. The obtained voltage is then inputted to the non-inverting input terminal of the comparator CP 1 and inverting input terminal of the comparator CP 2 for comparison to a triangle wave signal input thereto from the triangle wave oscillator OSC.

FIG. 9 illustrates an operating waveform inside the secondary side control circuit 5 b . In a time period during which the voltage Vadj is higher than the triangle wave signal OSC, the output of the comparator CP 1 assumes a high level and thus a gate signal Vg 21 is input to the switch element Q 21 through the driver Hdr as an ON signal, while the output of the comparator CP 2 assumes a low level and thus a gate signal Vg 2 is input to the switch element Q 2 as an OFF signal. In a time period during which the voltage Vadj is lower than the triangle wave signal OSC, the output of the comparator CP 1 assumes a low level and thus the gate signal Vg 21 is input to the switch element Q 21 through the driver Hdr as an OFF signal, while the output of the comparator CP 2 assumes a high level and thus a gate signal Vg 2 is input to the switch element Q 2 as an ON signal.

The operation of the step-up/down converter 13 b that operates as described above will be described in detail below. To make the following description more general, one of two outputs that is higher than the other in output voltage (in FIG. 1 , 24 V output) is set as Vo 1 , and the other one lower in output voltage (in FIG. 1 , 12 V output) is set as Vo 2 . As described above, the switch elements Q 21 and Q 2 are alternately turned on/off with a constant duty ratio. Further, this duty ratio can be set to an arbitrary value depending on the ratio between the resistors R 24 and R 25 . It is more effective when the duty ratio is set such that Don=(Vo 2 /Vo 1 ) is satisfied. For example, in the case where the output voltages are 24 V and 12 V, the resistors R 24 and R 25 are set such that 12 V/24 V=50% is satisfied. As described above, it is assumed that the switch elements Q 21 and Q 2 are alternately turned on/off with a Don=(Vo 2 /Vo 1 ).

Hereinafter, three states obtained depending on the output voltage of the Vo 2 which is a non-stabilized output will be described. Voltage drops occurring in the switch elements Q 21 and Q 2 and the diodes D 1 and D 2 , respectively are considerably smaller than the output voltages Vo 1 and Vo 2 and thus ignored for simplification.

First, operation under a load condition where the output Vo 2 which is a non-stabilized output assumes rated output voltage (in FIG. 1 , 12 V) will be described.

When the switch element Q 21 is in an ON state and the switch element Q 2 is in an OFF state, a difference between the voltages of the output Vo 1 and output Vo 2 , i.e., (Vo 1 −Vo 2 ) is applied to the reactor L 1 . Assuming that one cycle of the switching frequency of the step-up/down converter 13 b is T, current ripple IL 1 of the reactor L 1 is

IL 1={( Vo 1 −Vo 2)/ L 1 }×T ×( Vo 2 /Vo 1)  (1).

When the switch element Q 21 is in an OFF state and the switch element Q 2 is in an ON state, voltage of the output Vo 2 is generated in the reactor L 1 . Current ripple IL 1 ′ of the reactor L 1 at this time is

IL 1′=( Vo 2 /L 1)× T×{ 1−( Vo 2 /Vo 1)}  (2).

These two equations (1) and (2) are substantially the same. That is, the current ripple of the reactor L 1 is the same when the switch element Q 21 is in an ON state and the switch element Q 2 is in an OFF state and when the switch element Q 21 is in an OFF state and the switch element Q 2 is in an ON state. On average, power is not transferred between the output Vo 1 and output Vo 2 .

FIG. 10 is a view illustrating an operating waveform of the step-up/down converter 13 b in the case where the output voltage of the output Vo 2 which is a non-stabilized output is rated output voltage. As illustrated in FIG. 10 , current of the reactor L 1 goes back and forth between the Vo 2 direction and Vo 1 direction with 0 A as center, and the average current coincides with 0 A.

Secondly, operation under a load condition where the output Vo 2 which is a non-stabilized output assumes Vo 2 a that is a lower voltage than rated output voltage Vo 2 will be described.

When the switch element Q 21 is in an ON state and the switch element Q 2 is in an OFF state, a difference between the voltages of the output Vo 1 and output Vo 2 , i.e., (Vo 1 −Vo 2 a ) is applied to the reactor L 1 . Current ripple IL 1 a of the reactor L 1 at this time is

IL 1 a ={( Vo 1 −Vo 2 a )/ L 1 }×T ×( Vo 2 /Vo 1)  (3).

When the switch element Q 21 is in an OFF state and the switch element Q 2 is in an ON state, output voltage Vo 2 a is generated in the reactor L 1 . Current ripple IL 1 a ′ of the reactor L 1 at this time is

IL 1 a ′=( Vo 2 a/L 1)× T×{ 1−( Vo 2 /Vo 1)}  (4).

When the equation (3) is modified and assigned to the equation (4),

T/L 1 =IL 1 a×Vo 1 /{Vo 2×( Vo 1 −Vo 2 a )}  (3′)

IL 1 a′=IL 1 a×{Vo 2 a ×( Vo 1 −Vo 2)}/{ Vo 2×( Vo 1 −Vo 2 a )}  (4′)

are obtained. Since Vo 2 >Vo 2 a is satisfied, the numerator is smaller than the denominator on the right side of the equation (4′), so that IL 1 a >IL 1 a ′ is satisfied.

That is, the current ripple of the reactor L 1 generated at the time when the switch element Q 21 is in an ON state and the switch element Q 2 is in an OFF state is larger than the current ripple of the reactor L 1 generated at the time when the switch element Q 21 is in an OFF state and the switch element Q 2 is in an ON state, so that the current of the reactor L 1 changes in the direction in which power is supplied from the output Vo 1 to the output Vo 2 .

FIG. 11 is a view illustrating an operating waveform of the step-up/down converter 13 b in the case where the output voltage of the output Vo 2 which is a non-stabilized output is lower than rated output voltage. As illustrated in FIG. 11 , current of the reactor L 1 deviates in the direction in which power is supplied from the output Vo 1 to the output Vo 2 .

The output Vo 2 at time t 2 assumes a voltage value of Vo 2 a . Then, the output Vo 2 increases in its output voltage by receiving power supplied from the output Vo 1 and, at time t 3 at which the output Vo 2 has come close to the rated output voltage Vo 2 , the current ripples IL 1 a and IL 1 a ′ of the reactor L 1 are balanced to achieve stable operation. Further, a load condition where the output Vo 2 becomes lower than the rated output voltage is when the Vo 1 which is a stabilized output is light load or no load as illustrated in FIG. 2 . However, power supplied to the non-stabilized output Vo 2 by the operation of the step-up/down converter 13 b of the present invention works as a load as viewed from the stabilized output Vo 1 , contributing to further improvement of the cross regulation characteristics.

Finally, operation under a load condition where the output Vo 2 which is a non-stabilized output assumes Vo 2 b that is a higher voltage than the rated output voltage Vo 2 will be described.

When the switch element Q 21 is in an ON state and the switch element Q 2 is in an OFF state, a difference between the voltages of the output Vo 1 and output Vo 2 , i.e., (Vo 1 −Vo 2 b ) is applied to the reactor L 1 . Current ripple IL 1 b of the reactor L 1 at this time is

IL 1 b ={( Vo 1 −Vo 2 b )/ L 1 }×T ×( Vo 2 /Vo 1)  (5).

When the switch element Q 21 is in an OFF state and the switch element Q 2 is in an ON state, voltage of the output Vo 2 b is generated in the reactor L 1 . Current ripple IL 1 b ′ of the reactor L 1 at this time is

IL 1 b ′=( Vo 2 b/L 1)× T×{ 1−( Vo 2 /Vo 1)}  (6).

When the equation (5) is modified and assigned to the equation (6),

T/L 1 =IL 1 b×Vo 1 /{Vo 2×( Vo 1 −Vo 2 b )}  (5′)

IL 1 b′=IL 1 b×{Vo 2 b ×( Vo 1 −Vo 2)}/{ Vo 2×( Vo 1 −Vo 2 b )}  (6′)

are obtained. Since Vo 2 <Vo 2 b is satisfied, the numerator is larger than the denominator on the right side of the equation (5′), so that IL 1 b <IL 1 b ′ is satisfied.

That is, the current ripple of the reactor L 1 generated at the time when the switch element Q 21 is in an ON state and the switch element Q 2 is in an OFF state is smaller than the current ripple of the reactor L 1 generated at the time when the switch element Q 21 is in an OFF state and the switch element Q 2 is in an ON state, so that the current of the reactor L 1 changes in the direction in which power is supplied from the output Vo 2 to output Vo 1 .

FIG. 12 is a view illustrating an operating waveform of the step-up/down converter 13 b in the case where the output voltage of the output Vo 2 which is a non-stabilized output is higher than rated output voltage. As illustrated in FIG. 12 , current of the reactor L 1 deviates in the direction in which power is supplied from the output Vo 2 to output Vo 1 .

The output Vo 2 at time t 4 assumes a voltage value of Vo 2 b . Then, the output Vo 2 decreases in its output voltage by supplying power to the output Vo 1 and, at time t 5 at which the output Vo 2 has come close to the rated output voltage Vo 2 , the current ripples IL 1 b and IL 1 b ′ of the reactor L 1 are balanced to achieve stable operation. Further, a load condition where the output Vo 2 becomes higher than the rated output voltage becomes prominent as the load of the Vo 1 which is a stabilized output increases. However, power is supplied from the non-stabilized output Vo 2 to the stabilized output Vo 1 by the operation of the step-up/down converter 13 b of the present invention to reduce the power to be supplied from the secondary winding S 1 to the stabilized output Vo 1 , contributing to further improvement of the cross regulation characteristics.

Third Embodiment

A third embodiment according to the present invention will be described. FIG. 13 is a view illustrating a more detailed configuration of the step-up/down converter 13 c according to the third embodiment of the present invention and a secondary side control circuit 5 c that ON/OFF controls the switch elements Q 21 and Q 2 in the step-up/down converter 13 c . In FIG. 13 , a portion surrounded by a dotted frame corresponds to the secondary side control circuit 5 c . The secondary side control circuit 5 c has a configuration in which the resistors R 24 and R 25 of the secondary side control circuit 5 b in the second embodiment of FIG. 8 are replaced by resistors R 36 and R 37 , and operational amplifier OP 31 .

Resistors R 36 and R 37 are connected in series to both ends of the Vo 2 which is a non-stabilized output. Thus, voltage at the connection point of the resistors R 36 and R 37 corresponds to voltage obtained by dividing the voltage of the output Vo 2 in a ratio of (R 36 ):(R 37 ). The connection point of the resistors R 36 and R 37 is connected to the inverting input terminal of the operational amplifier OP 31 .

Reference voltage Vref 3 is connected to the non-inverting input terminal of the operational amplifier OP 31 . The operational amplifier OP 31 outputs an error signal obtained by comparing the voltage at the connection point of the resistors R 36 and R 37 with the reference voltage Vref 3 as voltage Vadj-a and inputs the voltage Vadj-a to the non-inverting input terminal of the comparator CP 1 and the inverting input terminal of the comparator CP 2 . Other configurations are the same as those of the secondary side control circuit 5 of the second embodiment of the present invention, and hence the repetitive explanations are omitted.

Operation of the secondary side control circuit 5 c will be described in detail below.

As illustrated in FIG. 13 , the operational amplifier OP 31 outputs an error signal between the voltage obtained by dividing the voltage of the non-stabilized output Vo 1 by the resistors R 36 and R 37 and the reference voltage Vref 3 as voltage Vadj-a. The voltage Vadj-a is input to the non-inverting input terminal of the comparator CP 1 and the inverting input terminal of the comparator CP 2 and then compared with a triangle wave signal input thereto from the triangle wave oscillator OSC. As in the second embodiment, the switch elements Q 21 and Q 2 are alternately turned ON/OFF with a duty ratio corresponding to the voltage Vadj-a. The voltage Vadj-a decreases when the voltage at the connection point of the resistors R 36 and R 37 becomes higher than the reference voltage Vref 3 and increases when the voltage at the connection point of the resistors R 36 and R 37 becomes lower. That is, when the non-stabilized output Vo 1 increases, the on-duty of the switch element Q 21 is narrowed, while when the non-stabilized output Vo 1 decreases, the on-duty of the switch element Q 21 is widened.

In the secondary side control circuit of the second embodiment illustrated in FIG. 8 , the duty ratio between the switch elements Q 21 and Q 2 is set constant. Actually, however, current flowing in the step-up/down converter 13 causes voltage drops to occur in the switch elements Q 21 and Q 2 , and diodes D 1 and D 2 , respectively, so that voltages generated in the reactor L 1 during the ON period of the switch elements become different. Further, in general, there exists a time period during which both the switch elements Q 21 and Q 2 are turned off in their ON/OFF switching time in order to prevent the both elements from being turned on at the same time. Thus, although the method of the second embodiment can improve the cross regulation characteristics within a voltage accuracy of e.g., 5%, it is not possible to completely control the cross regulation characteristics to rated output voltage set based on the duty ratio between the switch elements Q 21 and Q 2 . However, according to the third embodiment of FIG. 13 , the voltage of the Vo 2 which is a non-stabilized output is detected so as to control the duty ratio between the switch elements Q 21 and Q 2 , thereby obtaining more accurate cross regulation characteristics.

Fourth Embodiment

FIG. 14 illustrates a fourth embodiment of the present invention. The circuit configuration of a step-up/down converter 13 d of the fourth embodiment of the present invention illustrated in FIG. 14 differs from the circuit configuration of the step-up/down converter 13 c of the third embodiment of the present invention illustrated in FIG. 13 in that the circuit configuration of the step-up/down converter 13 d includes a secondary side control circuit 5 d in which, in place of the reference voltage Vref 3 of the secondary side control circuit 5 c , the connection point of resistors R 48 and R 49 connected in series to both ends of the output voltage Vo 1 is connected to the non-inverting input terminal of the operational amplifier OP 31 . Other than that, the configuration is entirely the same.

It is ideal that the relationship between the output voltage Vo 1 and output voltage Vo 2 is the voltage times the turns ratio of the secondary winding S 1 to the secondary winding (S 1 +S 2 ). Accordingly, when the voltage of the stabilized output Vo 1 changes due to a variation in the detection accuracy of the voltage detector 6 or droop of the output voltage in an overload state, voltage generated in the secondary winding S 1 changes in proportion to the change of the voltage of the stabilized output Vo 1 . Thus, by changing a control voltage of the step-up/down converter 13 d (voltage to be input to the non-inverting input terminal of the operational amplifier OP 31 ) in accordance with the change in the output Vo 1 , power handled by the step-up/down converter 13 d can be reduced.

The operational amplifier OP 31 of the secondary side control circuit 5 d in the fourth embodiment of the present invention illustrated in FIG. 14 receives as input voltage obtained by dividing the output voltage of the stabilized output Vo 1 by the resistors R 48 and R 49 and voltage obtained by dividing the voltage of the non-stabilized output Vo 2 by the resistors R 36 and R 37 and outputs an error signal between the two voltages as voltage Vadj-b. That is, when the output voltage of the stabilized output Vo 1 changes, the control voltage of the secondary side control circuit 5 d also changes. Assuming that R 37 =R 49 =r is satisfied, the relationship between the resistors R 36 and R 48 can be calculated based on the turns ratio S 1 :S 2 of the secondary windings of the transformer T 1 as follows:

R 48 ={S 1 ×R 36 +(S 1 −S 2 )×r}/S 2 , whereby the output voltages Vo 1 and Vo 2 can be controlled at the same ratio as the turns ratio between the secondary windings S 1 and S 2 .

Fifth Embodiment

A fifth embodiment of the present invention will be described.

As illustrated in FIG. 1 , each of the embodiments of the present invention has a configuration in which the step-up/down converter ( 13 a to 13 d ) constituted by the switch element Q 21 , switch element Q 2 , reactor L 1 , secondary side control circuit ( 5 a to 5 d ) and the like, is connected between the outputs Vo 1 and Vo 2 , which is the same circuit configuration as that of a step-down chopper that has been generally used.

The conventional step-down chopper steps-down the output Vo 1 on the side at which the output voltage is higher so as to output total power to the output Vo 2 , so that when the power of the output Vo 2 is high, power loss occurring in the step-down chopper becomes large and, which requires a high-priced switch element or reactor. On the other hand, the step-up/down converters 13 a to 13 d according to the above first to fourth embodiments perform power conversion of only excess or deficiency of power of the non-stabilized output, making it possible to reduce the power to be handled, which allows the use of low-priced switch element or reactor.

However, in the case where the non-stabilized output is controlled to a set voltage in an abnormal state such as overload, current required to flow in the step-up/down converter 13 a to 13 d is increased, which may cause breakage of the switch element.

FIG. 15 illustrates a fifth embodiment of the present invention for solving the above problem. The fifth embodiment of the present invention illustrated in FIG. 15 differs from the fourth embodiment illustrated in FIG. 14 in that the fifth embodiment has a secondary side control circuit 5 e . That is, a current detection resistor R 56 is inserted between the reactor L 1 and capacitor C 2 of the step-up/down converter 13 e to differentiate the configuration of the secondary side control circuit.

Resistors R 51 , R 52 , and R 53 are connected in series between the connection point of the resistor R 56 and the capacitor C 2 and the GND terminal, the connection point between the resistors R 51 and R 52 is input, as voltage Va, to the inverting input terminal of the comparator CP 1 , and the connection point of the resistors R 52 and R 53 is input, as voltage Vb, to the non-inverting input terminal of the comparator CP 2 . Resistors R 54 and R 55 are connected in series between the connection point of the reactor L 1 and the resistor R 56 and the GND terminal, and the connection point of the resistors R 54 and R 55 is input, as voltage Vc, to the non-inverting input terminal of the comparator CP 1 and the inverting input terminal of the comparator CP 2 .

The output terminal of the comparator CP 1 is connected to a reset input terminal R of an RS flip-flop FF that changes its state at the rising edge, and the output terminal of the comparator CP 2 is input to a set input terminal S of the RS flip-flop FF. An output Q of the RS flip-flop FF is connected to the gate terminal of the switch element Q 21 through the driver Hdr that level-shifts a signal, and an output −Q thereof is connected to the gate terminal of the switch element Q 2 .

As in the case of the fourth embodiment illustrated in FIG. 14 , the output voltage Vo 2 is divided by the resistors R 36 and R 37 and is then connected to the inverting input terminal of the operational amplifier OP 31 , and the output voltage Vo 1 is divided by the resistors R 48 and R 49 and is then connected to the non-inverting input terminal of the operational amplifier OP 31 . The output terminal of the operational amplifier OP 31 is connected to the connection point of the resistors R 51 and R 52 through a resistor R 50 and a diode D 7 connected in series to each other. The diode D 7 has the anode terminal connected to the connection point of the resistors R 51 and R 52 .

Detailed operation of the secondary side control circuit 5 e will be described below.

FIG. 16 illustrates an operating waveform of the step-up/down converter 5 e.

The voltage Va at the connection point of the resistors R 51 and R 52 corresponds to voltage obtained by dividing the output voltage Vo 2 in a ratio of (R 51 ):(R 52 +R 53 ), and voltage Vb at the connection point of the resistors R 52 and R 53 corresponds to voltage obtained by dividing the output voltage Vo 2 in a ratio of (R 52 +R 53 ):(R 51 ), which is lower than the voltage Va. The voltage Vc at the connection point of the resistors R 54 and R 55 corresponds to voltage obtained by dividing the voltage between the connection point of the reactor L 1 and the resistor R 56 and the GND terminal in a ratio of R 54 :R 55 . The resistance values of the resistors R 51 to R 55 are set such that the voltage Vc is about several 10 mV lower than the voltage Va assuming that voltage drop does not occur in the resistor R 56 and that the diode D 7 is not connected to the connection point of the resistors R 51 and R 52 .

In the case where the non-stabilized output Vo 2 is lower than the set voltage Vo 2 (time period 1 of FIG. 16 ), the output of the operational amplifier OP 31 assumes a high level. The diode D 7 is connected between the output terminal of the operational amplifier OP 31 and the connection point of the resistors R 51 and R 52 , so that there is no influence on the voltage Va at the connection point of the resistors R 51 and R 52 and the voltage Vb at the connection point of the resistors R 52 and R 53 . Thus, when voltage drop does not occur in the resistor R 56 as described above, the voltage Vc is lower than the voltage Va.

When the switch element Q 21 is in an ON state, current flows in the reactor L 1 in the direction from the output Vo 1 to the output Vo 1 with the result that voltage drop occurs in the resistor R 56 and, accordingly, the voltage Vc increases. When the voltage Vc reaches the voltage Va, the output of the comparator CP 1 assumes “high”, and the output of the RS flip-flop FF is inverted to cause the switch elements Q 21 and Q 2 to be turned off and on, respectively. When the switch element Q 21 is turned off, current flowing in the reactor L 1 passes through the switch element Q 2 to be discharged to the output Vo 2 , with the result that the current flowing in the reactor L 1 gradually decreases. Accordingly, the voltage drop of the resistor R 56 is reduced, and the voltage Vc decreases. When the voltage Vc decreases to the voltage Vb, the output of the comparator CP 2 assumes “high”, and the output of the RS flip-flop FF is inverted to cause the switch elements Q 2 to be tuned off and the switch element Q 21 to be turned on once again.

As described above, the step-up/down converter 13 e can realize operation of the step-down converter that supplies power from the stabilized output Vo 1 to the non-stabilized output Vo 2 for compensating power deficiency as in the fourth embodiment illustrated in FIG. 14 by determining the ON periods of the switch elements Q 21 and Q 2 based on the peak value of the current flowing in the reactor L 1 in the ON period of the switch element Q 21 and the peak value of the current flowing in the reactor L 1 in the ON period of the switch element Q 2 . Further, it is possible to restrict the maximum value of the current flowing from the output Vo 1 to the output Vo 2 by the resistance values of the resistors R 51 to R 55 and current detection resistor R 56 , so that excessively large current does not flow in the step-up/down converter 13 e in an overload state, allowing the use of a low-priced switch element.

In the case where the non-stabilized output Vo 2 is higher than the set voltage Vo 2 (time period 3 of FIG. 16 ), the output of the operational amplifier OP 31 assumes a low level. When the output of the operational amplifier 31 assumes a low level, current is drawn from the connection point of the resistors R 51 and R 52 through the resistor R 50 and diode D 7 . When current is drawn from the connection point of the resistors R 51 and R 52 to the operational amplifier OP 31 , the voltage Va at the connection point of the resistors R 51 and R 52 and the voltage Vb at the connection point of the resistors R 52 and R 53 decrease. The resistance value of the resistor R 50 is set such that the voltage Vb is about several 100 mV lower than the voltage Vc assuming that voltage drop does not occur in the resistor R 56 in this state.

When the switch element Q 2 is in an ON state, the voltage of the output Vo 2 is applied to the reactor L 1 to cause current to flow in the direction from the capacitor C 2 to the reactor L 1 . This current generates voltage drop in the resistor R 56 and thus the voltage Vc decreases. When the voltage Vc reaches the voltage Vb, the output of the comparator CP 2 assumes a high level, and the output of the RS flip-flop FF is inverted to cause the switch elements Q 2 and Q 21 to be turned off and on, respectively. When the switch element Q 2 is turned off, current flowing in the reactor L 1 passes through the switch element Q 21 to be discharged from the output Vo 1 to the output Vo 1 , with the result that the current flowing in the reactor L 1 gradually decreases. Accordingly, the voltage drop of the resistor R 56 is reduced, and the voltage Vc increases. When the voltage Vc reaches the voltage Va, the output of the comparator CP 1 assumes a high level, and the output of the RS flip-flop FF is inverted to cause the switch elements Q 21 to be tuned off and the switch element Q 2 to be turned on once again.

As described above, the step-up/down converter 13 e can realize operation of the step-up converter that discharges excess power from the stabilized output Vo 1 to the non-stabilized output Vo 1 as in the fourth embodiment illustrated in FIG. 14 by determining the ON periods of the switch elements Q 21 and Q 2 based on the peak value of the current flowing in the reactor L 1 in the ON period of the switch element Q 2 and the peak value of the current flowing in the reactor L 1 in the ON period of the switch element Q 21 . Further, it is possible to restrict the maximum value of the current flowing from the output Vo 2 to the reactor L 1 during the ON period of the switch element Q 2 by the resistance values of the resistors R 51 to R 55 , resistor R 50 , and current detection resistor R 56 , so that excessively large current does not flow in the step-up/down converter 13 e in an overload state, allowing the use of a low-priced switch element.

In the case where the non-stabilized output Vo 2 is equal to the set voltage Vo 2 (time period 2 of FIG. 16 ), there is no excess or deficiency of power in the output Vo 2 , so that values of the voltage Va and voltage Vb are controlled such that the operation amplifier OP 31 makes the current flowing in the reactor L 1 become 0 A.

According to the above embodiments of the present invention, when the voltage of the non-stabilized output decreases or increases, the step-up/down converter ( 13 a to 13 e ) is used to exchange excess or deficiency of power between the stabilized output side and the non-stabilized output side, so that it is possible to achieve a switching power supply device without involving power loss which has been observed in the conventional art but with high power efficiency.

Further, according to the above embodiments of the present invention, the magnitude relationship between voltage of the stabilized output and voltage of the non-stabilized output is not restricted. That is, there is not such a restriction that the operation is achieved only under a condition satisfying (voltage of stabilized output)>(voltage of non-stabilized output) or satisfying (voltage of stabilized output)<(voltage of non-stabilized output). Thus, although the 24 V output is set as the stabilized output and the 12 V output is set as the non-stabilized output, the relationship between them may be reversed. Even in this case, the same effect can be obtained.

Further, according to the above embodiments, it is possible to suppress a transient voltage change of the stabilized output not only for a static load but also for a dynamic load change to stabilize the output voltage of the non-stabilized output, thereby improving the voltage accuracy of the non-stabilized output.

Further, according to the fifth embodiment of the present invention, it is possible to restrict the current flowing in the step-up/down converter 13 e , allowing a lower-priced switch element or reactor to be used.

Although the present invention has been described using concrete embodiments, the embodiments are merely illustrative and the present invention is not limited thereto.

1 : Switching power supply device

2 : AC power supply

3 : Full-wave rectifier bridge

4 : Primary side control circuit

5 a to 5 e : Secondary side control circuit

6 : Voltage detector

11 , 12 : Rectification smoothing circuit

13 a to 13 e : Step-up/down converter

T 1 : Transformer

P 1 : Primary winding of transformer T 1

S 1 , S 2 : Secondary winding of transformer T 1

P 2 : Tertiary winding of transformer T 1

R 1 to R 10 : Resistor

R 24 , R 25 , R 36 , R 37 , R 48 , R 49 , R 50 to R 56 : Resistor

C 1 to C 7 , C 9 : Capacitor

L 1 : Reactor

D 1 to D 7 : Diode

Q 1 , Q 2 , Q 21 : Switch element

Q 3 : MOSFET

PC: Photocoupler

TM 1 , TM 2 : Input terminal

TM 3 : 24 V output terminal

TM 4 : 12 V output terminal

GND: GND terminal

GND 1 , GND 2 : Ground potential

Ld 1 , Ld 2 : Load

OSC: Triangle wave oscillator

OP 1 , OP 2 , OP 31 : Operational amplifier

CP 1 , CP 2 : Comparator

Vop 1 : Output of operational amplifier OP 1

Vop 2 : Output of operational amplifier OP 2

Vg 1 : Gate signal of switch element Q 1

Vg 2 : Gate signal of switch element Q 2

Vg 21 : Gate signal of switch element Q 21

Vref 1 to Vref 3 : Reference voltage

FF: RS flip-flop

Hdr: Driver