Method of forming a thin film transistor having openings formed therein

A method of manufacturing a thin film transistor array panel, the method comprising:nforming a first signal line on a substrate;forming an interlayer insulating layer covering the first signal line and having a plurality of contact holes;forming a source electrode connected to the first signal line through the contact holes and a pixel electrode having a drain electrode opposite the source electrode;forming an organic layer on the source electrode and the pixel electrode;etching the organic layer to form an opening, wherein a lower width of the opening is wider than an upper width of the opening;forming a semiconductor in the opening, wherein the semiconductor contacts a portion of sides of the organic layer;forming a gate insulator on the semiconductor; andforming a second signal line including a gate electrode on the gate insulator.

A method of manufacturing a thin film transistor array panel, the method comprising:nforming a data line on a substrate;forming an interlayer insulating layer covering the data line and having a first contact hole;forming a gate line on the interlayer insulating layer;forming a first partition having a first inverse tapered structure and a first opening on the gate line;forming a gate insulator in the first opening;forming a source electrode and a pixel electrode having a drain electrode opposite the source electrode on the gate insulator and the first partition;forming a second partition having a second inverse tapered structure and a second opening on the source electrode and the pixel electrode; andforming a semiconductor in the second opening, wherein the semiconductor contacts a portion of sides of the second partition.