A power converter and method of controlling a power switch therein to improve power conversion efficiency at low output current. In one embodiment, the power converter includes a first power switch coupled to a source of electrical power and a second power switch coupled to the first power switch and to an output terminal of the power converter. The power converter also includes a controller configured to alternately enable conduction of the first and the second power switches with a duty cycle in response to an output characteristic of the power converter. The controller is configured to control a level of current in the first power switch when the second power switch is substantially disabled to conduct.

Claims

20 · 3 independent · depth 2

20 granted claims

›1.independentA controller for a circuit having first and second switches configured to alternately enable conduction of said first and said second switches with a …+6

›2.↳ 1The controller as recited in claim 1 wherein said controller includes an error amplifier configured to control said light level of current in said fir…d2

›3.↳ 1The controller as recited in claim 1 wherein said controller is configured to disable conduction of said second switch in response to a sensed current…d2

›4.↳ 1The controller as recited in claim 1 wherein said controller includes a current mirror configured to control said light level of current in said first…d2

›5.↳ 1The controller as recited in claim 1 wherein said circuit is a power converter and said controller is configured to disable conduction of said second …d2

›6.↳ 1The controller as recited in claim 1 wherein said controller is configured to disable said alternately enable conduction of said first and said second…d2

›7.↳ 1The controller as recited in claim 1 wherein said controller is configured to disable said alternately enable conduction of said first and said second…d2

›8.independentA method, comprising:nalternately enabling conduction of first and second switches with a primary duty cycle and a complementary duty cycle, respectiv…+6

›15.independentA circuit, comprising:nfirst and second switches; anda controller configured to alternately enable conduction of said first and said second switches w…+5

Classifications

3 codes

IPC · International Patent Classification

Section G — Physics

G05F3/613

USPC · US Patent Classification

323/224323/284

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Pendency

2.2 y

788 days filing → grant

Office actions

non-final + final

Responses

2 RCE

Examiner

Shawn Riley

art unit 2838 · TC 2800

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Citations: 129 back · 0 forward

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Priority chain

1 priority documents

›Priority documents — 1

Type	Document	Date
related publication	US 20100156374 A1	24 Jun 2010

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