Semiconductor device having multilevel copper wiring layers and its manufacture method

A semiconductor device comprising:na semiconductor substrate formed with a number of semiconductor elements;a first interlayer insulating film formed above said semiconductor substrate and having a first wiring recess;a first copper wiring embedded in the first wiring recess;a second interlayer insulating film having a second wiring recess comprising a wiring trench and a via hole extending in a depth direction from a bottom of said wiring trench, said second interlayer insulating film including a copper diffusion preventing layer formed on said first copper wiring and said first interlayer insulating film, an oxide film formed on the copper diffusion preventing layer, and an organic insulating resin layer formed on the oxide film, said wiring trench being formed in said organic insulating resin layer; anda second copper wiring embedded in the second wiring recess.

A method of manufacturing a semiconductor device, comprising steps of:n(A) forming a first interlayer insulating film above a semiconductor substrate formed with a number of semiconductor elements;(B) forming a first wiring recess through said first interlayer insulating film;(C) embedding a first copper wiring in said first wiring recess;(D) forming a second interlayer insulating film on said first interlayer insulating film, said second interlayer insulating film covering said first copper wiring and including a copper diffusion preventing layer, a first oxide film and an organic insulating resin layer in this order from a bottom;(E) forming a second wiring recess comprising a wiring trench and a via hole extending in a depth direction from a bottom of said wiring trench through said second interlayer insulating film, said wiring trench being formed in said organic insulating resin layer; and(F) embedding a second copper wiring in said second wiring recess.

A semiconductor device comprising:na semiconductor substrate formed with a number of semiconductor elements;a first interlayer insulating film formed above said semiconductor substrate and having a first wiring recess;a first copper wiring embedded in the first wiring recess;a second interlayer insulating film having a second wiring recess, said second wiring recess comprising a wiring trench and a via hole extending in a depth direction from a bottom of said wiring trench, said second interlayer insulating film including a copper diffusion preventing layer formed on said first copper wiring and said first interlayer insulating film, an adhesion layer formed of an oxide film on the copper diffusion preventing layer, and an organic insulating resin layer formed on said adhesion layer, said adhesion layer enhancing adhesion between said organic insulating resin layer and said copper diffusion preventing layer, said wiring trench being formed in said organic insulating resin layer; anda second copper wiring embedded in the second wiring recess.