USPatentGranted

Parallel processor system with asynchronous data transmission by a data producing processor to a data using processor employing controlled execution of a program by the data using processor for processing the data

Granted 2 Feb 1999 · no office action yet

Assignee: Hitachi, Ltd.

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Inventors: Akira Muramatsu, Naoki Hamanaka, Koichiro Omoda, Teruo Tanaka +5 · Examiner: William M. Treat

Application
647773
filed 30 Jan 1991
Publication
Not published
not published
Patent· this page
US 5,867,679
granted 2 Feb 1999

Life of the patent

2 dated events
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Abstract

A parallel computer system includes a plurality of processors, each of which is placed in data communication with an interconnecting network. Pairs of a data signal and a data identification code, predetermined for the data signal, are received by each processor and stored in a memory. Structure is provided for reading a data signal belonging to one of the pairs having a data identification code designated by a data readout instruction.

Claims

21 · 16 independent · depth 4
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21 granted claims

Classifications

12 codes
USPC · US Patent Classification
395/377395/800.26395/800.27395/676395/800.18395/800.25395/800.21395/581395/392395/588395/566395/800.16

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Pendency
8.0 y
2,925 days filing → grant
Office actions
0
on the grant's record
Examiner
William M. Treat
art unit —
Citations: 46 back · 4 forward

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