Pattern alignment mark of semiconductor device

The present invention relates to a pattern alignment mark of a semiconductor device, and more particularly to a pattern alignment mark of a semiconductor device being able to measure the overlay accuracy of patterns.

A pattern alignment mark for measuring overlay accuracy of patterns, in general, takes the form of double boxes, i.e. an interior and an exterior box. Conventional results of use of the pattern alignment mark will be explained in the following.

FIG. 1A shows a plan figure of a pattern alignment mark according to the conventional techniques. FIGS. 1B-a and 1B-b show the reflection intensities of light toward the X axis and the Y axis of a pattern alignment mark formed according to the conventional techniques. As shown in FIGS. 1B-a and 1B-b, according to the conventional techniques, at polysilicon film patterns 1, 2, 3, formed on a wafer for measuring the overlay accuracy, the light reflection intensity 4 reflected from a polysilicon pattern 1 at the X axis and the light reflection intensity 5 reflected from a polysilicon pattern 2 at the Y axis have different intensities. Therefore, when measuring the consecutive overlay accuracy which finds the distance between boundary sides 1 X2 , 1 X3 , 1 Y2 , 1 Y3 of the polysilicon film pattern 3 for forming the interior box and boundary sides 1 X1 , 1 X4 , 1 Y1 , 1 Y4 of the polysilicon film patterns 1, 2 for forming the exterior box, an alignment error could occur.

Therefore, it is an object of the present invention to eliminate the aforementioned problems by providing a method for forming a pattern alignment mark of a semiconductor device which prevents the occurrence of alignment error by diminishing regional differences in the light reflection intensities while measuring the overlay accuracy of patterns.

In order to attain the foregoing objects, the present invention comprises, in a pattern alignment mark equipped with at least one designated measuring pattern for an alignment during the process of fabrication of semiconductor devices, a means for attenuating light reflection on the pattern with higher light reflection intensity among the designated measuring patterns.

The above and other objects, features and advantages of the present invention will be clearly understood from the following detailed description taken in conjunction with the accompanying diagrams, in which:

FIG. 1(A) is a plane figure of a pattern alignment mark according to the conventional techniques;

FIGS. 1B-a and 1B-b are graphs showing the light reflection intensities toward the X axis and the Y axis of a pattern alignment mark formed according to the conventional techniques;

FIG. 2A is a plane figure of a pattern alignment mark according to one embodiment of the present invention;

FIGS. 2B-a and 2B-b are graphs showing the light reflection intensities toward the X axis and the Y axis of a pattern alignment mark formed according to one embodiment of the present invention;

FIGS. 3, 4, 5 and 6 are plane figures of a pattern alignment mark according to other embodiments of the present invention;

Referring to FIGS. 2A, 2B, 3, 4, 5 and 6, the embodiments of the present invention are described in detail in the following.

FIG. 2A shows a plane figure forming a pattern alignment mark according to one embodiment of the present invention. FIGS. 2B-a and 2B-b show the light reflection intensity toward the X axis and the Y axis of a pattern alignment mark formed according to one embodiment of the present invention. The embodiment according to the present invention shows the diminution of light reflection intensity toward the X axis by additionally forming a photoresist film pattern 60 on the first polysilicon film pattern 10 which has higher light reflection intensity than the first and the second polysilicon film patterns 10 and 20 which are formed to make the exterior box of a pattern alignment mark.

Therefore, as shown in FIGS. 2B-a and 2B-b, the light reflection intensities, 4', 5' of said polysilicon film patterns 10 and 20 could be equalized. Accordingly, overall regional differences in the light reflection intensities could be eliminated.

It is recommended that said photoresist film pattern 60 is simultaneously formed with the formation of the third polysilicon film pattern 30 for making an interior box of a pattern alignment mark.

In the case where two boundary sides 2 X1 , 2 X4 , of the first polysilicon film patterns 10 and two boundary sides 2 X1' , 2 X4' of the photoresist film patterns 60 are matching, it may be difficult to measure the overlay accuracy of patterns. Thus, as shown in FIG. 2A, the boundary sides 2 X1' , 2 X4' of the photoresist film patterns 60 are located outwardly from the boundary sides 2 X1 , 2 X4 of the first polysilicon film patterns 10 by a margin (A) of at least 2 μm.

FIGS. 3, 4, 5 and 6 show plane figures of a pattern alignment mark according to other embodiments of the present invention. According to the embodiment of the present invention, as shown in FIG. 3, photoresist film patterns 60 are formed inwardly to overspread the boundary sides 2 X1 , 2 X4 Of the first polysilicon film patterns 10 by a margin of 2 μm to 5 μm (b), and as shown in FIG. 4, photoresist film patterns 70 could be formed with multiple rectangular patterns arrayed so that each side thereof has a size of 1 μm to 4 μm.

According to the embodiment of the present invention, as shown in FIG. 5, photoresist film patterns 80 could be formed with multiple circular patterns arrayed so that the diameter thereof has a size of 1 μm to 4 μm, and as shown in FIG. 6, photoresist film patterns 90 could be formed with multiple holes arrayed so that the diameter thereof has a size of 1 μm to 4 μm. It is proper that the photoresist film patterns 60, 70, 80 and 90 could be either positive or negative type.

Overlay accuracy measurement for an alignment is done by measuring the distance between the boundary sides 2 X2 , 2 X3 , 2 Y2 , 2 Y3 of the third polysilicon film pattern 30, which forms the interior box, and the boundary sides 2 X1 , 2 X4 , 2 Y1 , 2 Y4 of the first and second polysilicon film patterns 10, 20, which form the exterior box.

As above mentioned, the present invention prevents the occurrence of a pattern alignment error due to the differences in the light reflection intensities while measuring the overlay accuracy of patterns, and thus could have the special effect of enhancing the yield and the reliability of fabrication by achieving the stabilization of the process and the reduction of the process time.

Although the preferred embodiments of the invention have been disclosed for illustrative purposes, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims.