Transmitter with compensating mechanism of pulling effect

This application claims priority to Taiwan Application Serial Number, 104144712, filed Dec. 31, 2015, which is herein incorporated by reference.

The present disclosure relates to a transmitter. More particularly, the present disclosure relates to a transmitter with compensating of pulling effect and an eliminating method thereof.

In various wireless communication systems, a transmitter can modulate the frequency, by using an oscillating signal generated from an oscillator, to generate a radio frequency signal that is suited for the wireless communication. However, as the size of transmitters become smaller and smaller, such a radio frequency signal could be inadvertently coupled back to the oscillator. As a result, a phase error may be introduced into the oscillating signal, and thus the overall performance of the transmitter may be reduced. The aforementioned phenomenon is commonly known as the “pulling effect.”

In some approaches, the calibration mechanism for eliminating the pulling effect is arranged subsequent to a mixer. As a result, the required bandwidth for such calibration mechanism may be too high. The cost and complexity of the transmitter are thus increased. In some other approaches, the calibration circuit for eliminating the pulling effect is arranged in a phase locked loop. As a result, unwanted phase noise may be introduced and this may reduce the performance of the transmitter.

The disclosure can be more fully understood by reading the following detailed description of the embodiment, with reference made to the accompanying drawings as follows:

FIG. 1A is a schematic diagram of some embodiments of a transmitter in the present disclosure.

FIG. 1B is a schematic diagram illustrating a mathematical model, for the transmitter occurring the pulling effect, in the time domain.

FIG. 1C is a schematic diagram illustrating a mathematical model of a correction matrix for eliminating the pulling effect.

FIG. 2 is a schematic diagram of a transmitter in accordance with some embodiments of the present disclosure.

FIG. 3 is a flow chart of an adjust method for adjusting the coefficients C 1 -C 2 , in accordance with some embodiments of the present disclosure.

FIG. 4 is a schematic diagram of some embodiments of the phase correction circuit in FIG. 2 .

FIG. 5 is a schematic diagram of some other embodiments of the phase correction circuit in FIG. 2 .

Reference will now be made in detail to the present embodiments of the disclosure, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.

As used herein, “signal A(t)” indicates a continuous signal in a form of the analog signal, “signal A[n]” indicates a discrete signal in a form of the digital signal, and corresponds to the signal A(t). For example, the signal A[n] can be converted, by a digital-to-analog converter, to the corresponding signal A(t). Similarly, in some other embodiments, the signal A(t) can be converted, by an analog-to-digital converter, to the corresponding signal A[n].

FIG. 1A is a schematic diagram of some embodiments of a transmitter in the present disclosure.

A digital-to-analog converter (DAC) 110 receives a baseband signal S DBB , and generates a corresponding analog signal S ABB according to the baseband signal S DBB . A low pass filter 120 removes the images on the analog signal S ABB introduced from the digital-to-analog transformation. A voltage-controlled oscillator (VCO) 130 generates an oscillating signal S VCO having a frequency f VCO to a local oscillating signal generator 140 . The local oscillating signal generator 140 thus divides the oscillating signal S VCO to generate a local oscillating signal S LO having a local frequency f LO to a mixer 150 . The mixer 150 upconverts the filtered analog signal S ABB according to the oscillating signal S LO , to output a modulation signal S VM . A power amplifier 160 amplifies the power of the modulation signal S VM to generate an output signal S VO . An antenna 170 emits the output signal S VO . The output signal S VO can be expressed as the following equation (1) in the time domain:

S VO =GA BB ( t )cos(ω LO t+θ BB ( t )+σ)  (1)

In the equation (1), G is an overall gain of the transmitter 100 , A BB (t) is the amplitude of the analog signal S ABB , ω LO is a radian frequency corresponding to the local frequency f LO , θ BB (t) is the phase of the analog signal S ABB , and σ is an additional phase introduced during the baseband signal S DBB passes the transmitter 100 .

When the pulling effect is present in the VCO 130 , the output signal S VO is able to be amended as the following equation (2):

S VO =GA BB ( t )cos(ω LO t+θ BB ( t )+σ+θ( t ))  (2)

where θ(t) is the phase error introduced from the pulling effect. If it is assumed that the additional phase σ is 0, and the gain G of the transmitter 100 is 1, the output signal S VO can be further simplified as the following equation (3):

S VO =A BB ( t )cos(ω LO t+θ BB ( t )+θ( t ))  (3)

The equation (3) is expanded to obtain the following equation (4):

where I(t)=S ABB (t)cos(θ BB (t)), and I(t) is an in-phase data signal corresponding to the baseband signal S DBB . Q(t)=S ABB (t)sin(θ BB (t)) and Q(t) is a quadrature data signal corresponding to the baseband signal S DBB .

FIG. 1B is a schematic diagram illustrating a mathematical model, for the transmitter 100 occurring the pulling effect, in the time domain.

FIG. 1C is a schematic diagram illustrating a mathematical model of a correction matrix for eliminating the pulling effect. With the mathematical model illustrated in FIG. 1B , the present disclosure provides a correction method for eliminating the pulling effect as described as follows.

In some embodiments, before being mixed, the analog signal S ABB can be calibrated with the correction matrix 100 A in FIG. 1C , to eliminate the phase error θ(t) introduced from the pulling effect. According to the respective mathematical models illustrated in FIG. 1B and FIG. 1C , it can be obtained that the in-phase data signal I(t) and the quadrature data signal Q(t) are satisfied with the following equation (5):

According to the equation (5), the analog signal S ABB is pre-processed by the correction matrix 100 A to eliminate the phase error θ(t) introduced from the pulling effect.

If the equation (5) is expressed as in a form of the complex function, as the following equation (6):

I ′( t )+ jQ ′( t )=[ I ( t )+ Q ( t )] e [−jθ(t)] =[ I ( t )+ Q ( t )][α( t )+ j β( t )]  (6)

where I′(t)+jQ′(t) is a correction signal, which is generated from processing of the correction matrix 100 A, a phase correction signal α(t) is cos(θ(t)), and a phase correction signal β(t) is −sin(θ(t)). Effectively, by using the correction matrix 100 A to pre-process the analog signal S ABB , a pre-phase correction signal φ(t) is able to be generated, in which φ(t)=−θ(t). As a result, when the correction signal I′(t)+jQ′(t) is mixed through the mixer 150 , the pre-phase correction signal φ(t) and the phase error θ(t) are canceled out each other. Accordingly, the impact of the pulling effect is thus eliminated.

With reference to the related descriptions and FIG. 3 of a reference document (Pulling Mitigation in Wireless Transmitters IEEE JSSC vol. 49, NO. 9, September 2014.), the phase error θ(t) is related to the baseband signal S DBB . The analog signal S ABB , which the baseband signal S DBB corresponds to, is able to be linearly composed of the in-phase data signal I(t) and the quadrature data signal Q(t). In other words, S ABB =I(t)+jQ(t). According to FIG. 3 of the reference document and the equation (6), the pre-phase correction signal φ(t) can be expressed as the following equation (7) after the coordinate transformation:

φ[ n ]= C 1( I 2 [ N ]− Q 2 [ N ])+ C 2(2 I [ n ] Q [ n ])  (7)

Therefore, various embodiments described in the present disclosure can utilize coefficients C 1 and C 2 in the equation (7) to generate the pre-phase correction signal φ[n]. As discussed above, since φ(t)=−θ(t), after the pre-phase correction signal φ[n] is determined, the correction signal I′(t)+jQ′(t) can be generated, by using the correction matrix 100 A, to the transmitter 100 , in order to eliminate impacts of the pulling effect.

The following paragraphs provide various embodiments to illustrate the applications of the equation (7). As described above, the embodiments in FIGS. 1A-1C are presented in a form of the complex function. For a clearer explanation, the following embodiments are presented in a concept of the frequency domain or the time domain.

FIG. 2 is a schematic diagram of a transmitter in accordance with some embodiments of the present disclosure. For ease of understanding, like elements in FIG. 2 are designated with the same reference numbers with respect to FIGS. 1A-1C .

As shown in FIG. 2 , the transmitter 200 includes a correction unit 220 and an output unit 240 . The output unit 240 includes the DACs 110 and 112 , the low pass filters 120 and 122 , the VCO 130 , the local oscillating signal generator 140 , the mixers 150 and 152 , the adder 154 , the power amplifier 160 , and the antenna 170 .

The DAC 110 generates the correction signal I′(t) according to the correction signal I′[n]. The low pass filter 120 removes the images, which are introduced from the digital-to-analog conversion, on the correction signal I′(t). The mixer 150 up-modulates the filtered correction signal I′(t) according to the local oscillating signal S ILO , to output a modulation signal S VM1 .

The DAC 112 generates the correction signal Q′(t) according to the correction signal Q′[n]. The low pass filter 122 removes the images on the correction signal Q′(t). The mixer 152 up-modulates the filtered correction signal Q′(t) according to the local oscillating signal S QLO , to output a modulation signal S VM2 . The adder 154 sums up the modulation signal S VM1 and the modulation signal S VM2 , to generate a modulation signal S VM3 . The power amplifier 170 amplifies the modulation signal S VM3 to generate an output signal S VO1 . The antenna 170 emits the output signal S VO1 outwardly.

In some embodiments, the correction unit 220 includes a feedback control circuit 222 and a calculation circuit 224 . The feedback control circuit 222 analyzes the output signal S VO1 to generate a digital code S DC1 , and generates the coefficients C 1 and C 2 in the aforementioned equation (7) according to the digital code S DC1 . The calculation circuit 224 is able to generate the correction signals I′[n] and Q′[n] to the output unit 240 according to the coefficients C 1 and C 2 , the in-phase data signal I[n], and quadrature data signal Q[n].

The feedback circuit 222 includes an attenuator 222 A, a self-mixer 222 B, an amplifier 222 C, an analog-to-digital converter (ADC) 222 D, and a correction circuit 222 E.

The attenuator 222 A reduces the power of the output signal S VO1 , to generate an output signal S VO2 to the self-mixer 222 b . As such, the self-mixer 222 B and subsequent circuits are prevented from directly receiving the output signal S VO1 having a high power, to increase the circuit reliability. In some embodiments, the attenuator 222 A is implemented with at least one coupling capacitor. The self-mixer 222 B modulates the output signal S VO2 according to the output signal S VO2 , to generate a detection signal S VD . In some embodiments, the self-mixer 222 B is implemented with a mixer circuit having a pair of cross-coupled input transistors.

In some other embodiments, if the gain of the power amplifier 160 is lower, the output signal S VO1 can be directly input to the self-mixer 222 B to generate the detection signal S VD . The arrangements above are given for illustrative purposes only. Person skilled in the art can adjust the arrangements of the attenuator 222 A and the self-mixer 222 B.

The amplifier 222 C amplifies the detection signal S VD to generate a detection signal S VD′ . In some embodiments, the amplifier 222 C is an amplifier circuit having a fixed gain. In some other embodiments, the amplifier 222 C is an amplifier circuit having an adjustable gain. The ADC 222 D generates digital code S DC1 according to the detection signal S VD′ . The correction circuit 222 E generates the aforementioned coefficients according to the digital code S DC1 .

Reference is now made to FIG. 1 and FIG. 8 of the reference document above and the related descriptions thereof. The frequency of the output signal S VO of the transmitter 100 is f LO +f M , in which f M is the frequency of the analog signal S ABB , which can be also referred to as the frequency of the quadrature data signal Q(t) or that of the in-phase signal I(t). When being suffered from the pulling effect, two main types of noise, which have a frequency f LO +3f M and a frequency f LO −f M respectively, are present in the output terminal of the transmitter 100 . In other words, the output signal S VO1 mainly has signal components having a frequency f LO +f M , a frequency f LO +3f M , a frequency f LO −f M , respectively. According to the descriptions above, the detection signal S VD at least includes signal components having a frequency 2f M and a frequency 4f M . In other words, in some embodiments, the frequency of the signal components in the detection signal S VD is about two times or four times of the frequency of the quadrature data signal Q(t) or the in-phase signal I(t). Accordingly, the digital code DC 1 , which is generated by the ADC 222 D, at least includes signal components having a frequency 2f M and a frequency 4f M . Therefore, the signal components, which have the frequency 2f M and the frequency 4f M , can be utilized to indicate noise impact from the pulling effect.

In some embodiments, the correction circuit 222 E includes a signal power detector 223 and an adjust circuit 225 . The signal power detector 223 detects the power of the signal components having a frequency 2f M and a frequency 4f M , to generate an adjust signal S VA . The adjust circuit 225 adjusts the coefficients C 1 -C 2 , and outputs the same to the calculation circuit 224 . In some other embodiments, compared with the signal component having the frequency 2f M , the frequency of the signal components having the frequency 4f M is much higher. Accordingly, the signal component having the frequency 4f M is significantly attenuated during the transmission. Therefore, in this embodiment, the signal power detector 223 can only detect the power of the signal component having the frequency 2f M , to generate the adjust signal S VA .

With the arrangements of the feedback control circuit illustrated above, the coefficients C 1 -C 2 can be adjusted, to reduce the power of the noise signal components having the frequency f LO +3f M and the frequency f LO −f M . Effectively, the impact of the pulling effect on the transmitter 200 is reduced.

FIG. 3 is a flow chart of an adjust method for adjusting the coefficients C 1 -C 2 , in accordance with some embodiments of the present disclosure. In some embodiments, the adjust circuit 225 is implemented by digital circuits. In some other embodiments, the digital circuits include a processing unit, which performs the method 300 in FIG. 3 to generate the coefficients C 1 -C 2 . The processing unit obtains the power of the signal components having the frequency 2f M and the frequency 4f M from the adjust signal S VA .

In some embodiments, the coefficients C 1 -C 2 are alternately adjusted by comparing the powers of the signal components, which are previously detected twice in a row, having the frequency 2f M or 4f M . In FIG. 3 , E(n) indicates the power of the signal component having the frequency 2f M or 4f M , and n indicates the number of times the coefficients C 1 -C 2 are adjusted. In operation S 301 , adjustment trends for the coefficients C 1 -C 2 are an increment, i.e., SIGN_C 1 and SIGN_C 2 are configured to be one, in which SIGN_C 1 and SIGN_C 2 are the adjustment trends for the coefficients C 1 -C 2 , respectively. In operation S 302 , check whether the power (i.e., E(n−3)) of the signal component, which is detected in the previous three times, having the frequency 2f M or 4f M , is lower than the power (i.e., E(n−2)) of the signal component, which is detected in the previous two times, having the frequency 2f M or 4f M . If yes, operation S 303 is performed. Otherwise, operation S 304 is performed.

In operation S 303 , the adjustment trend for the coefficient C 1 is adjusted to be the opposite of the current adjustment trend for the coefficient C 1 , i.e., SIGN_C 1 is set to be −SIGN_C 1 . As discussed above, the coefficients C 1 -C 2 are adjusted to reduce the power of the signal components having the frequency f LO +3f M and the frequency f LO −f M . In this example, when the power E(n−3) is lower than the power E(n−2), it indicates that an error has occurred in the adjustment trend for the coefficient C 1 . Accordingly, the adjustment trend for C 1 is adjusted. Alternatively, when the power E(n−3) is higher than the power E(n−2), it indicates that the adjustment trend for the coefficient C 1 is correct.

In operation S 304 , the coefficient C 1 ( n ) is generated, in which C 1 ( n )=C 1 ( n −2)+SIGN_C 1 *STEP_C 1 . In the above equation, C 1 ( n −2) indicates the value of the coefficient C 1 at the previous two times, and STEP_C 1 is a predetermined adjustment value for the coefficient C 1 . In this example in which operation S 301 is performed, when the error is occurred in the adjustment trend for the coefficient C 1 , the coefficient C 1 can be changed to subtract from the predetermined adjustment value STEP_C 1 , to generate a new coefficient C 1 . Alternatively, when the adjustment trend for the coefficient C 1 is correct, the coefficient C 1 still can be increased with the predetermined adjustment value STEP_C 1 , to generate a new coefficient C 1 .

In operation S 305 , the new coefficient C 1 ( n ) is output, the coefficient C 2 ( n ) is kept, and the number of the adjust time n is increased, i.e., n=n+1. In operation S 306 , determine whether the power (i.e., E(n−3)) of the signal component, which is detected in the previous three times, having the frequency 2f M or 4f M , is lower than the power (i.e., E(n−2)) of the signal component, which is detected in the previous two times, having the frequency 2f M or 4f M . If yes, operation S 307 is performed. Otherwise, operation S 308 is performed. In operation S 307 , the adjustment trend for the coefficient C 2 is adjusted to be the opposite of the current adjustment trend for the coefficient C 2 , i.e., SIGN_C 2 is set to be −SIGN_C 2 . In operation S 308 , the coefficient C 2 is generated, in which C 2 ( n )=C 2 ( n −2)+SIGN_C 2 *STEP_C 2 . In the above equation, C 2 ( n −2) indicates the value of the coefficient C 2 at the previous two times, and STEP_C 2 is a predetermined adjustment value for the coefficient C 2 .

After the coefficient C 1 is adjusted, it is able to check whether an error is occurred in the adjustment trend for the coefficient C 2 with the same operation. The coefficient C 2 can be output after the adjustment trend for the coefficient C 2 is determined. The operations S 306 -S 308 are similar with the operations S 302 -S 304 , and thus the repetitious descriptions are not given here.

In operation S 309 , check whether the number of the adjust times n exceeds a threshold value. If yes, the adjustment is terminated, and the coefficients C 1 -C 2 are output. Otherwise, operation S 302 is then performed again, to further adjust the coefficient C 1 -C 2 to be better values. With proper arrangement of operation S 309 , the operation efficiency of the transmitter 200 can be kept.

The arrangements of adjusting the coefficients C 1 -C 2 are given for illustrative purposes only. Various arrangements that can adjust the coefficients C 1 -C 2 are within the contemplated scope of the present disclosure.

With continued reference to FIG. 2 , the calculation circuit 224 includes a phase correction circuit 224 A and a correction signal generation circuit 224 B. The phase correction circuit 224 A generates the pre-phase correction signal φ[n] according to the coefficients C 1 -C 2 , the in-phase data signal I[n], and the quadrature data signal Q[n]. The correction signal generation circuit 224 B generates correction signals I′[n] and Q′[n] to the DACs 110 and 112 , according to the pre-phase correction signal φ[n], the in-phase data signal I[n], and the quadrature data signal Q[n]. In some embodiments, the correction signal generation circuit 224 B can be implemented with digital circuits of the correction matrix 100 A in FIG. 1C . In other words, according to the pre-phase correction signal φ[n] generated by the phase correction circuit 224 A, the correction signal generation circuit 224 B performs the calculation of the equation (5) to generate the correction signals I′(t) and Q′(t).

FIG. 4 is a schematic diagram of some embodiments of the phase correction circuit in FIG. 2 . As shown in FIG. 4 , in this embodiment, the phase correction circuit 400 includes multipliers 401 - 405 , a subtractor 406 , and an adder 407 . In some embodiments, the phase correction circuit 400 is applicable to narrow-band applications.

The multiplier 401 multiplies the in-phase data signal I[n] by the square, to generate an operation value I 2 [n]. The multiplier 402 multiplies the quadrature data signal Q[n] by the square, to generate an operation value Q 2 [n]. The multiplier 403 multiplies the in-phase data signal I[n] with the quadrature data signal Q[n], to generate an operation value I[n]Q[n]. The subtractor 406 subtracts the operation value Q 2 [n] from the operation value I 2 [n], to generate an operation value I 2 [n]-Q 2 [n]. The multiplier 404 multiplies the coefficient C 1 with the operation value I 2 [n]-Q 2 [n], to generate an operation value C 1 *(I 2 [n]-Q 2 [n]). The multiplier 405 multiplies two times of the coefficient C 2 with the operation value I[n]Q[n], to generate an operation value 2C 2 *I[n]Q[n]. The adder 407 sums up the operation value C 1 *(I 2 [n]-Q 2 [n]) and the operation value 2C 2 *I[n]Q[n], to generate the pre-phase correction signal φ[n]. Effectively, the phase correction circuit 400 generates the pre-phase correction signal φ[n] in the equation (7), and transmits the same to the output unit 240 to eliminate the impact of the pulling effect.

FIG. 5 is a schematic diagram of some other embodiments of the phase correction circuit in FIG. 2 . For ease of understanding, like elements in FIG. 5 are designated with the same reference number with respect to FIG. 4 . Compared with the embodiments in FIG. 4 , the phase correction circuit 500 is applicable to wide-band applications.

As shown in FIG. 5 , in this embodiment, the phase correction circuit 500 includes the multipliers 401 - 403 , the subtractor 406 , the adder 407 , and finite impulse response (FIR) filters 501 - 502 . The operations of the multipliers 401 - 403 , the subtractor 406 , and the adder 407 in FIG. 5 are the same as the operations of the embodiments in FIG. 4 , and thus repetitious descriptions are not given here.

In some embodiments, each coefficient in each tap of the FIR filters 501 - 502 can be designed, such that the FIR filters 501 - 502 can generate required operation values. For example, in the bandwidth, which is desired to be corrected, of the transmitter 200 , N testing signals having a frequency f i are inputted to the transmitter 200 in sequence, where i=1, 2, 3, . . . , N, and N is a positive integer. The signal power detector 223 then detects the power of the signal components having the frequency 2f i or 4f i in the detection signal S VD . Meanwhile, the power of the signal components having the frequency 2f i or 4f i are reduced by using the method 300 above to adjust the coefficients C 1 -C 2 . When the power of the signal components having the frequency 2f i or 4f i are reduced to be minimum, the current coefficients C 1 -C 2 are stored as filtering coefficients C 1 , i and C 2 , i . After N groups of the filtering coefficients C 1 , i and C 2 , i are obtained, an inverse Fourier transform is performed with the filtering coefficients C 1 , i -C 1 ,N and conjugates of the filtering coefficients C 1 , i -C 1 ,N. As a result, the coefficients of 2N taps of the FIR filter 501 are obtained according to real parts in the transformed result. Similarly, an inverse Fourier transform are performed with the filtering coefficients 2C 2 , i -2C 2 ,N and conjugates of the filtering coefficients 2C 2 , i -2C 2 ,N. As a result, the coefficients of 2N taps of the FIR filter 502 are obtained according to real parts in the transformed result. Effectively, when the operation values I 2 [n]-Q 2 [n] and I[n]Q[n] are transmitted through the FIR filters 501 - 502 , the FIR filters 501 - 502 can output the corresponding operation value to the adder 407 , to generate the pre-phase correction signal φ[n].

As discussed above, the transmitter provided in the present disclosure instantly detects the power of the output signal, to generate the correction signal for eliminating errors caused from the pulling effect. As a result, the system performance of the transmitter and the accuracy of transmitting data can be improved.

It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the present disclosure without departing from the scope or spirit of the disclosure. In view of the foregoing, it is intended that the present disclosure cover modifications and variations of this disclosure provided they fall within the scope of the following claims.